Hi all, Today's linux-next merge of the powerpc tree got a conflict in:
arch/powerpc/include/asm/cputable.h
arch/powerpc/kernel/dt_cpu_ftrs.c
between commit:
a5d4b5891c2f ("powerpc/mm: Fixup tlbie vs store ordering issue on POWER9")
from the powerpc-fixes tree and commits:
9bbf0b576d32 ("powerpc: Free up CPU feature bits on 64-bit machines")
b5af4f279323 ("powerpc: Add CPU feature bits for TM bug workarounds on POWER9
v2.2")
from the powerpc tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc arch/powerpc/include/asm/cputable.h
index 2e2bacbdf6ed,ecee84dea7e7..000000000000
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@@ -174,38 -181,40 +181,41 @@@ static inline void cpu_feature_keys_ini
#define LONG_ASM_CONST(x) 0
#endif
- #define CPU_FTR_HVMODE
LONG_ASM_CONST(0x0000000100000000)
- #define CPU_FTR_ARCH_201 LONG_ASM_CONST(0x0000000200000000)
- #define CPU_FTR_ARCH_206 LONG_ASM_CONST(0x0000000400000000)
- #define CPU_FTR_ARCH_207S LONG_ASM_CONST(0x0000000800000000)
- #define CPU_FTR_ARCH_300 LONG_ASM_CONST(0x0000001000000000)
- #define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000002000000000)
- #define CPU_FTR_CTRL LONG_ASM_CONST(0x0000004000000000)
- #define CPU_FTR_SMT LONG_ASM_CONST(0x0000008000000000)
- #define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000010000000000)
- #define CPU_FTR_PURR LONG_ASM_CONST(0x0000020000000000)
- #define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000040000000000)
- #define CPU_FTR_SPURR LONG_ASM_CONST(0x0000080000000000)
- #define CPU_FTR_DSCR LONG_ASM_CONST(0x0000100000000000)
- #define CPU_FTR_VSX LONG_ASM_CONST(0x0000200000000000)
- #define CPU_FTR_SAO LONG_ASM_CONST(0x0000400000000000)
- #define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0000800000000000)
- #define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0001000000000000)
- #define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0002000000000000)
- #define CPU_FTR_STCX_CHECKS_ADDRESS LONG_ASM_CONST(0x0004000000000000)
- #define CPU_FTR_POPCNTB
LONG_ASM_CONST(0x0008000000000000)
- #define CPU_FTR_POPCNTD
LONG_ASM_CONST(0x0010000000000000)
- #define CPU_FTR_PKEY LONG_ASM_CONST(0x0020000000000000)
- #define CPU_FTR_VMX_COPY LONG_ASM_CONST(0x0040000000000000)
- #define CPU_FTR_TM LONG_ASM_CONST(0x0080000000000000)
- #define CPU_FTR_CFAR LONG_ASM_CONST(0x0100000000000000)
- #define CPU_FTR_HAS_PPR
LONG_ASM_CONST(0x0200000000000000)
- #define CPU_FTR_DAWR LONG_ASM_CONST(0x0400000000000000)
- #define CPU_FTR_DABRX LONG_ASM_CONST(0x0800000000000000)
- #define CPU_FTR_PMAO_BUG LONG_ASM_CONST(0x1000000000000000)
- #define CPU_FTR_P9_TLBIE_BUG LONG_ASM_CONST(0x2000000000000000)
- #define CPU_FTR_POWER9_DD1 LONG_ASM_CONST(0x4000000000000000)
- #define CPU_FTR_POWER9_DD2_1 LONG_ASM_CONST(0x8000000000000000)
+ #define CPU_FTR_REAL_LE
LONG_ASM_CONST(0x0000000000001000)
+ #define CPU_FTR_HVMODE
LONG_ASM_CONST(0x0000000000002000)
+ #define CPU_FTR_ARCH_201 LONG_ASM_CONST(0x0000000000004000)
+ #define CPU_FTR_ARCH_206 LONG_ASM_CONST(0x0000000000008000)
+ #define CPU_FTR_ARCH_207S LONG_ASM_CONST(0x0000000000010000)
+ #define CPU_FTR_ARCH_300 LONG_ASM_CONST(0x0000000000020000)
+ #define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000000000040000)
+ #define CPU_FTR_CTRL LONG_ASM_CONST(0x0000000000080000)
+ #define CPU_FTR_SMT LONG_ASM_CONST(0x0000000000100000)
+ #define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000000000200000)
+ #define CPU_FTR_PURR LONG_ASM_CONST(0x0000000000400000)
+ #define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000000000800000)
+ #define CPU_FTR_SPURR LONG_ASM_CONST(0x0000000001000000)
+ #define CPU_FTR_DSCR LONG_ASM_CONST(0x0000000002000000)
+ #define CPU_FTR_VSX LONG_ASM_CONST(0x0000000004000000)
+ #define CPU_FTR_SAO LONG_ASM_CONST(0x0000000008000000)
+ #define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0000000010000000)
+ #define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0000000020000000)
+ #define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0000000040000000)
+ #define CPU_FTR_STCX_CHECKS_ADDRESS LONG_ASM_CONST(0x0000000080000000)
+ #define CPU_FTR_POPCNTB
LONG_ASM_CONST(0x0000000100000000)
+ #define CPU_FTR_POPCNTD
LONG_ASM_CONST(0x0000000200000000)
+ #define CPU_FTR_PKEY LONG_ASM_CONST(0x0000000400000000)
+ #define CPU_FTR_VMX_COPY LONG_ASM_CONST(0x0000000800000000)
+ #define CPU_FTR_TM LONG_ASM_CONST(0x0000001000000000)
+ #define CPU_FTR_CFAR LONG_ASM_CONST(0x0000002000000000)
+ #define CPU_FTR_HAS_PPR
LONG_ASM_CONST(0x0000004000000000)
+ #define CPU_FTR_DAWR LONG_ASM_CONST(0x0000008000000000)
+ #define CPU_FTR_DABRX LONG_ASM_CONST(0x0000010000000000)
+ #define CPU_FTR_PMAO_BUG LONG_ASM_CONST(0x0000020000000000)
+ #define CPU_FTR_POWER9_DD1 LONG_ASM_CONST(0x0000040000000000)
+ #define CPU_FTR_POWER9_DD2_1 LONG_ASM_CONST(0x0000080000000000)
+ #define CPU_FTR_P9_TM_HV_ASSIST
LONG_ASM_CONST(0x0000100000000000)
+ #define CPU_FTR_P9_TM_XER_SO_BUG LONG_ASM_CONST(0x0000200000000000)
++#define CPU_FTR_P9_TLBIE_BUG LONG_ASM_CONST(0x0000400000000000)
#ifndef __ASSEMBLY__
diff --cc arch/powerpc/kernel/dt_cpu_ftrs.c
index 8ca5d5b74618,0a0c601c6ade..000000000000
--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
@@@ -709,9 -710,9 +710,12 @@@ static __init void cpufeatures_cpu_quir
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
else if ((version & 0xffffefff) == 0x004e0201)
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
+ else if ((version & 0xffffefff) == 0x004e0202)
+ cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST |
+ CPU_FTR_P9_TM_XER_SO_BUG;
+
+ if ((version & 0xffff0000) == 0x004e0000)
+ cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_BUG;
}
static void __init cpufeatures_setup_finished(void)
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