Hi All,
Thanks a lot for your replies.
@NXP developers: Could you please tell us some information?
Thanks,
Christian
On 08 January 2018 at 02:14AM, Michal Suchanek wrote:
On 7 January 2018 at 19:54, Olof Johansson <o...@lixom.net> wrote:
On Sun, Jan 7, 2018 at 5:04 AM, Christian Zigotzky
<chzigot...@xenosoft.de> wrote:
Hello Michael,
Thanks for your reply. We are using P.A. Semi and Freescale CPUs.
@Olof
Do you have some infos for us?
I'm low on spare time to experiment and explore what might be exposed
or not, and I no longer have any proprietary microarchitecture
documentation of the core.
I suggest reaching out to your supplier of the silicon for commercial
support and information, or just going with what I'm sure will be
architecturally generic solutions to the problem when IBM has them
ready.
The solution for IBM POWER involves patching the firmware as well as
Linux. Without knowledge of the architecture specifics it is not
possible to tell if other cores are affected and if the measures
implemented by IBM can be used. In fact they probably rely on
64s-specific instructions and are in part implemented in 64s-specific
assembly files.
So this will not work without support for the specific core either by
the vendor or somebody who has knowledge of the architecture details.
Thanks
Michal
