Acked-by: Minghuan Lian <minghuan.l...@nxp.com>
> -----Original Message-----
> From: Bao Xiaowei [mailto:xiaowei....@nxp.com]
> Sent: Tuesday, October 24, 2017 4:31 PM
> To: robh...@kernel.org; mark.rutl...@arm.com; catalin.mari...@arm.com;
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> <minghuan.l...@nxp.com>
> Cc: Xiaowei Bao <xiaowei....@nxp.com>
> Subject: [PATCH 1/3] ARMv8: dts: ls1046a: add the property of IB and OB
>
> Add the property of inbind and outbind windows number for ep driver.
>
> add the inband or outband window entry for pcie controller ep driver used in
> dts.
>
> Signed-off-by: Bao Xiaowei <xiaowei....@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index 06b5e12d04d8..f8332669663c 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -674,6 +674,8 @@
> device_type = "pci";
> dma-coherent;
> num-lanes = <4>;
> + num-ib-windows = <6>;
> + num-ob-windows = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x40
> 0x00010000 0x0 0x00010000 /* downstream I/O */
> 0x82000000 0x0 0x40000000 0x40
> 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -699,6
> +701,8 @@
> device_type = "pci";
> dma-coherent;
> num-lanes = <2>;
> + num-ib-windows = <6>;
> + num-ob-windows = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x48
> 0x00010000 0x0 0x00010000 /* downstream I/O */
> 0x82000000 0x0 0x40000000 0x48
> 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -724,6
> +728,8 @@
> device_type = "pci";
> dma-coherent;
> num-lanes = <2>;
> + num-ib-windows = <6>;
> + num-ob-windows = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x50
> 0x00010000 0x0 0x00010000 /* downstream I/O */
> 0x82000000 0x0 0x40000000 0x50
> 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
> --
> 2.14.1