On Thu, 26 Oct 2017 09:41:32 +1100
Paul Mackerras <pau...@ozlabs.org> wrote:
> On Thu, Oct 26, 2017 at 01:22:37AM +1000, Nicholas Piggin wrote:
> > On Wed, 25 Oct 2017 18:16:53 +1100
> > Paul Mackerras <pau...@ozlabs.org> wrote:
> >
> > > Commit 07d2a628bc00 ("powerpc/64s: Avoid cpabort in context switch
> > > when possible", 2017-06-09) changed the definition of PPC_INST_COPY
> > > and in so doing inadvertently broke the check for copy/paste
> > > instructions in the alignment fault handler. The check currently
> > > matches no instructions.
> > >
> > > This fixes it by ANDing both sides of the comparison with the mask.
> >
> > Thanks for fixing it. Any reason not to change the mask to 0xfc2006fe
> > to include the 'last' bit that is now mandatory?
>
> What does real hardware do if you execute the instruction without that
> bit set? Does it take the alignment interrupt, or does it take an
> illegal instruction interrupt (i.e. HEAI)? We need to catch all the
> variants that take an alignment interrupt. If P9 hardware takes a
> HEAI when that bit isn't set, then I'm fine with changing the mask.
Just tested. Copy without the bit results in an illegal instruction.
Even the valid paste variant causes a sigill because it's set to use
HEA to avoid the thread reconfig problem.
Thanks,
Nick
