Book3S radix-mode has no SLB interrupt limitation, and hash-mode has
a 1T limitation on modern CPUs.
Update the paca alloation limits to match the stack allocation. Book3E
still needs a look.
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
arch/powerpc/kernel/paca.c | 37 +++++++++++++++++++++++++++----------
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index 8d63627e067f..fd7deb79110a 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -194,22 +194,39 @@ void setup_paca(struct paca_struct *new_paca)
static int __initdata paca_size;
-void __init allocate_pacas(void)
+static __init unsigned long safe_paca_limit(void)
{
- u64 limit;
- int cpu;
+ unsigned long limit = ULONG_MAX;
- limit = ppc64_rma_size;
-
-#ifdef CONFIG_PPC_BOOK3S_64
/*
- * We can't take SLB misses on the paca, and we want to access them
- * in real mode, so allocate them within the RMA and also within
- * the first segment.
+ * We access pacas in real mode, so allocate them within real mode
+ * constraints.
*/
- limit = min(0x10000000ULL, limit);
+ limit = min((unsigned long)ppc64_rma_size, limit);
+
+#ifdef CONFIG_PPC_BOOK3S_64
+ if (!early_radix_enabled()) {
+ /*
+ * We can't take SLB misses on the paca, so allocate them
+ * within the first segment.
+ */
+ if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
+ limit = min(1UL << SID_SHIFT_1T, limit);
+ else
+ limit = min(1UL << SID_SHIFT, limit);
+ }
#endif
+ /* XXX: what about Book3E? (e.g., see safe_stack_limit) */
+
+ return limit;
+}
+
+void __init allocate_pacas(void)
+{
+ unsigned long limit = safe_paca_limit();
+ int cpu;
+
paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
paca = __va(memblock_alloc_base(paca_size, PAGE_SIZE, limit));
--
2.11.0
