Benjamin Herrenschmidt <b...@kernel.crashing.org> writes:
> The PWC flush only needs a single set call, just like the
> full (RIC=2) flush.
>
> This will allow us to get rid of the dedicated _tlbiel_pwc()
Reviewed-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com>
>
> Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
> ---
> arch/powerpc/mm/tlb-radix.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
> index 744e0164ecf5..2f2967a2db93 100644
> --- a/arch/powerpc/mm/tlb-radix.c
> +++ b/arch/powerpc/mm/tlb-radix.c
> @@ -54,12 +54,15 @@ static inline void _tlbiel_pid(unsigned long pid,
> unsigned long ric)
> */
> __tlbiel_pid(pid, 0, ric);
>
> - if (ric == RIC_FLUSH_ALL)
> - /* For the remaining sets, just flush the TLB */
> - ric = RIC_FLUSH_TLB;
> + /* For PWC, only one flush is needed */
> + if (ric == RIC_FLUSH_PWC) {
> + asm volatile("ptesync": : :"memory");
> + return;
> + }
>
> + /* For the remaining sets, just flush the TLB */
> for (set = 1; set < POWER9_TLB_SETS_RADIX ; set++)
> - __tlbiel_pid(pid, set, ric);
> + __tlbiel_pid(pid, set, RIC_FLUSH_TLB);
>
> asm volatile("ptesync": : :"memory");
> asm volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory");
> --
> 2.13.3
