Michael Neuling <mi...@neuling.org> writes: > On Wed, 2017-06-07 at 17:24 +1000, Michael Ellerman wrote: >> Michael Neuling <mi...@neuling.org> writes: >> >> > Bits 48:51 in the PVR for POWER9 represent different chip types (scale >> > up vs out and 12 vs 24 core). Current chips have 0 here, but could be >> > non-zero in the future. >> > >> > This changes the POWER9 DD1 mask to correctly ignore these bits 48:51. >> > >> > Signed-off-by: Michael Neuling <mi...@neuling.org> >> > --- >> > arch/powerpc/kernel/cputable.c | 4 ++-- >> > 1 file changed, 2 insertions(+), 2 deletions(-) >> >> Presumably we should backport this? > > Actually, we need to scrap this patch. > > Looks like the scale up version will be marked as DD1, but it won't need these > workarounds. So we need it to match on the other POWER9 entry.
OK. /giphy "dumpster fire" cheers
