On Wed, Mar 15, 2017 at 10:26 PM, Michael Ellerman <m...@ellerman.id.au> wrote: > Oliver O'Halloran <ooh...@gmail.com> writes: > >> Traditionally we have only ever tracked which CPUs are in the same core >> (cpu_sibling_mask) and on the same die (cpu_core_mask). For Power9 we >> need to be aware of which CPUs share cache with each other so this patch >> adds cpu_cache_mask and the underlying cpu_cache_map variable to track >> this. > > But which cache?
I'm not sure it matters. All the scheduler really wants to know is that that migrating between cpus with a shared cache is cheaper than migrating elsewhere. > Some CPUs on Power8 share L3, or L4. Eh... it's not really the same. The "L4" is part of the memory buffers and it's function is conceptually different to the processor caches. The L3 on P8 is only shared when the core that owns is offline (or sleeping) so the scheduler doesn't really need to be aware of it. Even if the scheduler was aware I don't think it can take advantage of it without some terrible hacks. > > I think just call it cpu_l2cache_map to make it explicit. I was being deliberately vague. I know it's only a shared currently, but it's possible we might have a (real) shared L3 in the future. The latest high-end x86 chips have some of l3 sharing across the entire chip so you never know. I'm not particularly attached to the name though, so i'll rename it if you really want. Oliver
