On Wednesday 16 January 2008, David Gibson wrote:
> On Tue, Jan 15, 2008 at 08:09:25AM +0100, Stefan Roese wrote:
> > The patch adds the Haleakala dts. The Haleakala is a stripped down
> > version of the Kilauea (405EX) with only one EMAC and only one PCIe
> > interface.
>
> [snip]
>
> > +                   IIC0: [EMAIL PROTECTED] {
> > +                           device_type = "i2c";
>
> No device_type here.

Ok.

> > +                           compatible = "ibm,iic-405exr", "ibm,iic";
> > +                           reg = <ef600400 14>;
> > +                           interrupt-parent = <&UIC0>;
> > +                           interrupts = <2 4>;
> > +                   };
> > +
> > +                   IIC1: [EMAIL PROTECTED] {
> > +                           device_type = "i2c";
>
> Or here.

Ok.

> > +                           compatible = "ibm,iic-405exr", "ibm,iic";
> > +                           reg = <ef600500 14>;
> > +                           interrupt-parent = <&UIC0>;
> > +                           interrupts = <7 4>;
> > +                   };
> > +
> > +
> > +                   RGMII0: [EMAIL PROTECTED] {
> > +                           device_type = "rgmii-interface";
>
> And especially not here.

Ok.

Your comments are valid for some of the other 4xx dts files too. Should I 
create a patch that removes these device-types there too?

> > +                           compatible = "ibm,rgmii-405exr", "ibm,rgmii";
> > +                           reg = <ef600b00 104>;
> > +                           has-mdio;
> > +                   };
>
> [snip]
>
> > +           PCIE0: [EMAIL PROTECTED] {
> > +                   device_type = "pci";
> > +                   #interrupt-cells = <1>;
> > +                   #size-cells = <2>;
> > +                   #address-cells = <3>;
> > +                   compatible = "ibm,plb-pciex-405exr", "ibm,plb-pciex";
> > +                   primary;
> > +                   port = <0>; /* port number */
> > +                   reg = <a0000000 20000000        /* Config space access 
> > */
> > +                          ef000000 00001000>;      /* Registers */
> > +                   dcr-reg = <040 020>;
> > +                   sdr-base = <400>;
>
> Oh, for crying out loud.  They put dcrs on the bridge as well as MMIO
> registers. *facepalm*

Yep. PCIe on 4xx has DCR, SDR *and* MMIO registers.

Best regards,
Stefan
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