>From PowerISA v2.07, architecture provides a special NOP
instruction called "Probe-Nop" defined as "and 0,0,0".
This form of "and" is reserved for use exclusively by the
Performance Monitor.
Usage example:
Add PROBENOP() macro to __tlbie() in hash_native_64.c to
verify the number of TLBIE. Power8 provides "PM_TLBIE_FIN"
PMU event (r30058) to count "tlbie finished".
Power8 PMU event "PM_PROBE_NOP_DISP" (r40014) counts the
"ProbeNops dispatched".
With modified kernel booted, output from perf:
# ./perf stat -e r30058,r40014 ls
....
Performance counter stats for 'ls':
7 r30058
7 r40014
0.003296959 seconds time elapsed
Macro comes handy when want to count specific instructions
which may or may not have a PMU event.
Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/ppc-opcode.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h
b/arch/powerpc/include/asm/ppc-opcode.h
index c4ced1d01d57..61c62a1a402c 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -462,4 +462,14 @@
((IH & 0x7) << 21))
#define PPC_INVALIDATE_ERAT PPC_SLBIA(7)
+/*
+ * From PowerISA v2.07, architecture provides a special NOP instruction
+ * called "Probe-Nop" defined as "and 0,0,0". This form of "and" is
+ * reserved for use exclusively by the Performance Monitor.
+ */
+#define _PROBENOP(x) stringify_in_c(.long PPC_INST_AND | \
+ ___PPC_RS(x) | \
+ ___PPC_RA(x) | \
+ ___PPC_RB(x))
+#define PROBENOP(x) asm volatile(_PROBENOP(x))
#endif /* _ASM_POWERPC_PPC_OPCODE_H */
--
2.7.4
