On Mon, 2017-02-06 at 02:05:16 UTC, Benjamin Herrenschmidt wrote: > Three tiny changes to the ERAT flushing logic: First don't make > it depend on DD1. It hasn't been decided yet but we might run > DD2 in a mode that also requires explicit flushes for performance > reasons so make it unconditional. We also add a missing isync, and > finally remove the flush from _tlbiel_va as it is only necessary > for congruence-class invalidations (PID, LPID and full TLB), not > targetted invalidations. > > Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
Applied to powerpc fixes, thanks. https://git.kernel.org/powerpc/c/90c1e3c2fafec57fcb55b5d69bcf29 cheers
