On Thu, 2016-12-15 at 14:22 +0100, Valentin Longchamp wrote:
> This board is built around Freescale's T1040 SoC.
>
> The peripherals used by this design are:
> - DDR3 RAM with SPD support
> - parallel NOR Flash as boot medium
> - 1 PCIe bus (PCIe1 x1)
> - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
> - 4 IFC bus devices:
> - NOR flash
> - NAND flash
> - QRIO reset/power mgmt CPLD
> - BFTIC chassis management CPLD
> - 2 I2C buses
> - 1 SPI bus
> - HDLC bus with the QE's UCC1
> - last but not least, the mandatory serial port
>
> The board can be used with the corenet32_smp_defconfig.
>
> Signed-off-by: Valentin Longchamp <valentin.longch...@keymile.com>
> ---
> arch/powerpc/boot/dts/fsl/kmcent2.dts | 303
> ++++++++++++++++++++++++++
> arch/powerpc/platforms/85xx/corenet_generic.c | 1 +
> 2 files changed, 304 insertions(+)
> create mode 100644 arch/powerpc/boot/dts/fsl/kmcent2.dts
>
> diff --git a/arch/powerpc/boot/dts/fsl/kmcent2.dts
> b/arch/powerpc/boot/dts/fsl/kmcent2.dts
> new file mode 100644
> index 0000000..47afa43
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/kmcent2.dts
> @@ -0,0 +1,303 @@
> +/*
> + * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
> + *
> + * (C) Copyright 2016
> + * Valentin Longchamp, Keymile AG, valentin.longch...@keymile.com
> + *
> + * Copyright 2014 - 2015 Freescale Semiconductor Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
[SNIP]
> +
> + ucc_hdlc: ucc@2000 {
> + device_type = "hdlc";
> + compatible = "fsl,ucc-hdlc";
> + rx-clock-name = "clk9";
> + tx-clock-name = "clk9";
Should it be clk9 on both tx and rx clock?
Jocke
