So, like, the other day "Grant Likely" mumbled:
> > +
> > + ranges = <80000000 80000000 70000000 /* pci mem space */
> > + fdf00000 fdf00000 00100000 /* EUMB */
> > + fe000000 fe000000 00c00000 /* pci i/o space */
> > + fec00000 fec00000 00300000 /* pci cfg regs */
> > + fef00000 fef00000 00100000>; /* pci iack */
>
> This doesn't look nice. On the other ppc boards, Kumar moved the pci
> bus node out of the soc node so the the internal register range is
> separate from the soc.
Oh crap. I forgot about that. Yes, you are right.
> I think it should look like this:
>
> {
> [EMAIL PROTECTED] {
> compatible = "fsl,mpc8241-immr";
> ranges = <0 fe000000 00100000>;
> [EMAIL PROTECTED] {
> blah....
> };
> blah....
> };
> [EMAIL PROTECTED] {
> ranges = blah....
> };
> };
So, I'll definitely rework that part as in indicated
> > + clock-frequency = <d# 97553800>; /* Hz */
>
> That's kind of an odd number for clock frequency. Usually clock
> frequencies are *big* and *round*. :-)
And this one, according to Andy, is nice-n-measured right
off the crystal! I had 10M in there originally even.
But I'll double check that with him to be sure.
Thanks,
jdl
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