On Tue, 2016-05-17 at 14:01 +0200, Christophe Leroy wrote: > On processors like the 8xx, the machine check exception can also > happen directly on the load/store instruction itself, so that case > needs to be handled as well > > Signed-off-by: Christophe Leroy <christophe.le...@c-s.fr> > ---
What machine checks are happening that this is handling? Is there still 8xx code that probes for registers that might not be there? -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
