On Wed, 2008-01-02 at 23:23 +0800, Kumar Gala wrote: > > On Jan 2, 2008, at 5:16 AM, Li Li wrote: > > > * The MPC837x PCIE controller hardware resources and SerDes are > > initiated in u-boot. > > * Merge the MPC837x PCIE code into arch/powerpc/sysdev/fsl_pci.c > > * The MPC837x PCIE controller`s configure address bit field is > uniqe: > > bus number: bits 31-24 > > device number: bits 23-19 > > function number: bits 18-16 > > ext reg number: bits 11-8 > > reg number: bits 7-2 > > * Add mpc837x_exclude_device to fixup a controller bug. > > what is the bug that is being worked around? > For Type 0 configure transactions, the PCIE controller do not check the device number bits and just assume the device number bits are 0.
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