On Fri, 2016-17-06 at 06:02:00 UTC, "Aneesh Kumar K.V" wrote:
> H_ENTER hcall handling in qemu had assumptions that a cache inhibited
> hpte entry won't have memory conference set. Also older kernel
> mentioned that some version of pHyp required this (the code removed
> by the below commit says:
>
> /* Make pHyp happy */
> if ((rflags & _PAGE_NO_CACHE) && !(rflags & _PAGE_WRITETHRU))
> hpte_r &= ~HPTE_R_M;
>
> But with older kernel we had some inconsistent memory conherence
> mapping. We always enabled memory conherence in the page fault path and
> removed memory conherence is _PAGE_NO_CACHE was set when we mapped the
> page via htab_bolt_mapping. The commit mentioned below tried to
> consolidate that by always enabling memory conherence. But as mentioned
> above that breaks Qemu H_ENTER handling.
>
> This patch update this such that we enable memory conherence only if
> cache inhibited is not set and bring fault handling, lpar and bolt
> mapping in sync.
>
> Fixes: commit 30bda41aba4e("powerpc/mm: Drop WIMG in favour of new constant")
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com>
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/e568006b9d828403397668864d
cheers
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