On Mon, 2016-07-03 at 22:08:47 UTC, Oliver O'Halloran wrote:
> In save_sprs() in process.c contains the following test:
>
> if (cpu_has_feature(cpu_has_feature(CPU_FTR_ALTIVEC)))
> t->vrsave = mfspr(SPRN_VRSAVE);
>
> CPU feature with the mask 0x1 is CPU_FTR_COHERENT_ICACHE so the test
> is equivilent to:
>
> if (cpu_has_feature(CPU_FTR_ALTIVEC) &&
> cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
>
> On CPUs without support for both (i.e G5) this results in vrsave not being
> saved between context switches. The vector register save/restore code
> doesn't use VRSAVE to determine which registers to save/restore,
> but the value of VRSAVE is used to determine if altivec is being used
> in several code paths.
>
> Signed-off-by: Oliver O'Halloran <ooh...@gmail.com>
> Signed-off-by: Anton Blanchard <an...@samba.org>
> Fixes: 152d523e6307 ("powerpc: Create context switch helpers save_sprs() and
> restore_sprs()")
> Cc: sta...@vger.kernel.org
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/01d7c2a2de47890934faba91a7
cheers
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