Paul Mackerras <pau...@ozlabs.org> writes: > On Tue, Feb 23, 2016 at 10:18:09AM +0530, Aneesh Kumar K.V wrote: >> We now use physical address in upper page table tree levels. Even though >> they are aligned to their size, for the masked bits we use the >> overloaded bit positions as per PowerISA 3.0. We keep the bad bits check >> as it is, and will use conditional there when adding radix. Bad bits >> check also check for reserved bits and we oveload some of the reserved >> fields of radix in hash config. >> >> Signed-off-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com> >> --- >> arch/powerpc/include/asm/book3s/64/hash-64k.h | 15 ++++++--------- >> 1 file changed, 6 insertions(+), 9 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h >> b/arch/powerpc/include/asm/book3s/64/hash-64k.h >> index f0f5f91d7909..60c2c912c3a7 100644 >> --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h >> +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h >> @@ -60,15 +60,12 @@ >> #define PTE_FRAG_SIZE_SHIFT 12 >> #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT) >> >> -/* >> - * Bits to mask out from a PMD to get to the PTE page >> - * PMDs point to PTE table fragments which are PTE_FRAG_SIZE aligned. >> - */ >> -#define PMD_MASKED_BITS (PTE_FRAG_SIZE - 1) >> -/* Bits to mask out from a PGD/PUD to get to the PMD page */ >> -#define PUD_MASKED_BITS 0x1ff >> -/* FIXME!! Will be fixed in next patch */ >> -#define PGD_MASKED_BITS 0 >> +/* Bits to mask out from a PMD to get to the PTE page */ >> +#define PMD_MASKED_BITS 0xc0000000000000ffUL >> +/* Bits to mask out from a PUD to get to the PMD page */ >> +#define PUD_MASKED_BITS 0xc0000000000000ffUL >> +/* Bits to mask out from a PGD to get to the PUD page */ >> +#define PGD_MASKED_BITS 0xc0000000000000ffUL > > Why not fold this into the previous patch? (and include this patch's > commentary in the previous patch's commentary, of course) >
Ok will do that. I was trying to make sure the change is called out separately. -aneesh _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev