On 11/23/07, Jon Smirl <[EMAIL PROTECTED]> wrote:
> On 11/23/07, Jon Smirl <[EMAIL PROTECTED]> wrote:
> > On 11/22/07, Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote:
> > >
> > > On Thu, 2007-11-22 at 19:00 -0500, Jon Smirl wrote:
> > > > > It seems like AMCC does provide the necessary infos for 4xx
> > > > processors
> > > > > though. Jon, do you think what they provide is enough to use an open
> > > > > source debugger ?
> > > >
> > > > Do you have a link to the info?
> > >
> > > Not at hand, but easy to find from AMCC main product page, you can then
> > > go to the various eval board download pages, and some of the d/l are
> > > infos for JTAG debugger manufacturers.
>
> Grant, I heard back from the Amontec (a JTAG company) developers. They
> are interested in doing an open JTAG for the Xilinx Microblaze.  Is
> that the FPGA you've been working with?

Yes, the FPGA I'm using can host a Microblaze design; except my work
has focused on the ppc405 hard IP core instead of the microblaze core.

Regardless, this sounds interesting.  Can you get JTAG debug info out of Xilinx?

Cheers,
g.
.
>
> --
> Jon Smirl
> [EMAIL PROTECTED]
>


-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
[EMAIL PROTECTED]
(403) 399-0195
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