> -----Original Message----- > From: Wood Scott-B07421 > Sent: Friday, October 12, 2007 4:10 AM > To: Li Yang-r58472 > Cc: [EMAIL PROTECTED]; [EMAIL PROTECTED]; > linuxppc-dev@ozlabs.org > Subject: Re: [PATCH 3/9 v2] add Freescale SerDes PHY support > > On Thu, Oct 11, 2007 at 05:53:45PM +0800, Li Yang wrote: > > diff --git a/arch/powerpc/platforms/Kconfig > > b/arch/powerpc/platforms/Kconfig index 19d4628..e89f803 100644 > > --- a/arch/powerpc/platforms/Kconfig > > +++ b/arch/powerpc/platforms/Kconfig > > @@ -291,4 +291,8 @@ config FSL_ULI1575 > > Freescale reference boards. The boards all use the > ULI in pretty > > much the same way. > > > > +config FSL_SERDES > > + bool > > + default n > > "default n" is the default -- no need to specify it explicitly. > > > + /* Configure SRDSCR1 */ > > + tmp = in_be32(regs + FSL_SRDSCR1_OFFS); > > + tmp &= ~FSL_SRDSCR1_PLLBW; > > + out_be32(regs + FSL_SRDSCR1_OFFS, tmp); > > clrbits32? > > > + /* Configure SRDSCR2 */ > > + tmp = in_be32(regs + FSL_SRDSCR2_OFFS); > > + tmp &= ~FSL_SRDSCR2_SEIC_MASK; > > + tmp |= FSL_SRDSCR2_SEIC_SATA; > > + out_be32(regs + FSL_SRDSCR2_OFFS, tmp); > > clrsetbits_be32?
Ok, I will try the up-to-the-minute arsenal. :) - Leo _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
