On Oct 11, 2007, at 6:46 AM, Paul Mackerras wrote: > In testing the new clocksource and clockevent code on a PPC601 > processor, I discovered that the clockevent multiplier value for the > decrementer clockevent was overflowing. Because the RTCL register in > the 601 effectively counts at 1GHz (it doesn't actually, but it > increases by 128 every 128ns), and the shift value was 32, that meant > the multiplier value had to be 2^32, which won't fit in an unsigned > long on 32-bit. The same problem would arise on any platform where > the timebase frequency was 1GHz or more (not that we actually have any > such machines today).
do you still have a 601 running somewhere? - k _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
