Alan Bennett wrote:
> Ok, making progress on the ep8248 / devtrees, etc...
>
> But I'm not getting any output on the serial and my log_buf is pretty
> clean. Without console; what's the best way to figure out why I'm not
> getting any output on my SMC1 serial port (using u-boot , not planetcore)?
U-boot locates the SMC1 registers in a different place than planetcore;
SMC1's reg property should be <11a80 20 0 40>, and the cpm's reg
property should be <119c0 30 80 1f80>.
> CS: chipselect {
> compatible = "fsl,ep8248e-chipselect",
> "fsl,mpc8248-chipselect",
> "fsl,pq2-chipselect";
> #address-cells = <2>;
> #size-cells = <1>;
> fsl,ctrl = <&CSCTRL>;
This has changed, and I haven't yet updated ep8248e. The above should be:
[EMAIL PROTECTED] {
compatible = "fsl,mpc8248-localbus",
"fsl,pq2-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <f0010100 40>;
You'll also need to update the bus probe matches in ep8248e.c.
> ranges = <0 0 f8000000 07f00000
> 0 1 fff00000 00080000
> 0 2 fff80000 00080000
This is wrong; the first cell is the chipselect, and the second cell is
the offset in bytes. I rather doubt the second flash begins at byte 1
and the third at byte 2. :-)
> 1 0 e4000000 00008000
> 2 0 d0000000 08000000>;
> /* F800_0000 -> FFF0_0000 */
> [EMAIL PROTECTED],0 {
> compatible = "cfi-flash";
> reg = <0 0 7F00000>;
> probe-type = "CFI";
> bank-width = <4>;
> };
This is a mix of the new and old flash bindings (again, I haven't yet
updated ep8248e). Look at the other dts files such as mpc8272ads and
ep88xc for assistance.
> /* F400_0000 */
> [EMAIL PROTECTED],0 {
It says e4000000 in ranges...
> #address-cells = <2>;
> #size-cells = <1>;
> reg = <1 0 10>;
> compatible = "fsl,ep8248e-bcsr";
> ranges;
>
> mdio {
> device_type = "mdio";
> compatible = "fsl,ep8248e-mdio-bitbang";
> #address-cells = <1>;
> #size-cells = <0>;
> reg = <1 8 1>;
>
> PHY0: [EMAIL PROTECTED] {
> interrupt-parent = <&PIC>;
> reg = <0>;
> device_type = "ethernet-phy";
> };
>
> PHY1: [EMAIL PROTECTED] {
> interrupt-parent = <&PIC>;
> reg = <1>;
> device_type = "ethernet-phy";
> };
> };
> };
> /* D000_0000 -> D7FF_FFFF */
> [EMAIL PROTECTED],0 {
> compatible = "cfi-flash";
> reg = <0 0 08000000>;
reg should be <2 0, not <0 0.
> [EMAIL PROTECTED] {
> #address-cells = <1>;
> #size-cells = <1>;
> device_type = "soc";
> compatible = "fsl,mpc8248", "fsl,pq2-soc";
> ranges = <00000000 f0000000 00053000>;
You need a reg property here until the kernel uses ranges; see the
mpc8272ads dts in my tree.
> CSCTRL: chipselect {
> compatible = "fsl,mpc8248-chipselect-ctrl",
> "fsl,pq2-chipselect-ctrl";
> reg = <10100 40>;
> fsl,bus = <&CS>;
> };
This can go away.
-Scott
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