On Fri, 2007-08-24 at 16:58 +1000, Michael Neuling wrote: > After talking to an IBM POWER hypervisor design and development (PHYP) > guy, there seems to be no need for memory barriers when updating the SLB > shadow buffer provided we only update it from the current CPU, which we > do. > > Also, these guys see no need in the future for these barriers.
Does this result in a significant performance gain? I'm just curious. josh _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
