On Wed, 2007-08-22 at 06:57 +0200, Nick Piggin wrote: > It doesn't seem like this primary function of mmiowb has anything to do > with a write barrier that we are used to (it may have a seconary semantic > of a wmb as well, but let's ignore that for now). A write barrier will > never provide you with those semantics (writes from 2 CPUs seen in the > same order by a 3rd party). If anything, I think it is closer to being > a read barrier issued on behalf of the target device. But even that I > think is not much better, because the target is not participating in the > synchronisation that the CPUs are, so the "read barrier request" could > still arrive at the device out of order WRT the other CPU's writes. > > It really seems like it is some completely different concept from a > barrier. And it shows, on the platform where it really matters (sn2), where > the thing actually spins.
The way mmiowb was actually defined to me by the ia64 folks who came up with it is essentially to order an MMIO write with a spin_unlock. Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
