On Aug 6, 2007, at 11:20 PM, David Gibson wrote: > The 440 family of processors don't have a tlbie instruction. So, we > implement TLB invalidates by explicitly searching the TLB with tlbsx., > then clobbering the relevant entry, if any. Unfortunately the PID for > the search needs to be stored in the MMUCR register, which is also > used by the TLB miss handler. Interrupts were enabled in _tlbie(), so > an interrupt between loading the MMUCR and the tlbsx could cause > incorrect search results, and thus a failure to invalide TLB entries > which needed to be invalidated. > > This patch fixes the problem in both arch/ppc and arch/powerpc by > inhibiting interrupts (even critical and debug interrupts) across the > relevant instructions. > > Signed-off-by: David Gibson <[EMAIL PROTECTED]> > --- > Paul, this one's a bugfix, which I think should go into 2.6.23.
Did you actually see this happen? - k _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
