>>> pci1: [EMAIL PROTECTED] {
>>> interrupt-map-mask = <1f800 0 0 7>;
>>
>> Set the mask to <1800 0 0 7>, and you need only 16
>> entries to encode the swizzle. Except...
>>
>>> + /* bus 1 , idsel 0x2 Tsi310 bridge
>> secondary */
>>
>> ...interrupts on bus 1 should be swizzled on bus 1, not
>> at the PHB. Really. It is a horrible workaround for a
>> non-existing problem to do it here, and I promise you
>> it _will_ come back to hurt you later. Not a threat,
>> just a promise :-)
>
> I just want to make it as a temporary workaround now.
That is fine.
> Extra patches will be provided to fix it.
Looking forward to it!
>>> + [EMAIL PROTECTED] {
>>> + interrupt-map-mask = <f800 0 0 7>;
>>> + interrupt-map = <
>>> +
>>> + /* IDSEL 0x0 (PEX) */
>>> + 00000 0 0 1 &mpic 0 1
>>> + 00000 0 0 2 &mpic 1 0
>>> + 00000 0 0 3 &mpic 2 0
>>> + 00000 0 0 4 &mpic 3 0>;
>>
>> Why sense 0 for all but the first entry in this map?
> Now, only the first entry is used.
Sure, but the other three entries are incorrect. Either
provide correct entries, or just leave the unused entries
out of the map; if those three interrupts aren't wired up,
that is the right thing to do, too.
Segher
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