Hi Stefan,
On 12/7/2017 9:04 PM, Stefan Wahren wrote:
> Hi Minas,
>
> Am 07.12.2017 um 17:56 schrieb Stefan Wahren:
>> Added missing GUSBCFG programming in host mode.
>>
>> These fields even if was programmed in device mode (in function
>> dwc2_hsotg_core_init_disconnected()) will be resetting to POR values
>> after core soft reset applied.
>> So, each time when switching to host mode required to set these fields
>> to correct values. It's allow fix issues with lot of transaction errors
>> due to timeouts and turnarrounds on USB bus.
>>
>> Signed-off-by: Minas Harutyunyan <hmi...@synopsys.com>
>
> please add a fixes tag.
>
>> ---
>> drivers/usb/dwc2/hcd.c | 9 ++++++++-
>> 1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
>> index 614bb9603def..05e4e8c07bf1 100644
>> --- a/drivers/usb/dwc2/hcd.c
>> +++ b/drivers/usb/dwc2/hcd.c
>> @@ -2317,10 +2317,17 @@ static int dwc2_core_init(struct dwc2_hsotg *hsotg,
>> bool initial_setup)
>> */
>> static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
>> {
>> - u32 hcfg, hfir, otgctl;
>> + u32 hcfg, hfir, otgctl, usbcfg, val;
>>
>> dev_dbg(hsotg->dev, "%s(%p)\n", __func__, hsotg);
>>
>> + /* Set HS/FS Timeout Calibration and USBTrdTim */
>> + usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
>> + usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_USBTRDTIM_MASK);
>> + val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
>> + usbcfg |= (GUSBCFG_TOUTCAL(7) | (val << GUSBCFG_USBTRDTIM_SHIFT));
>
> These are too much magic numbers (9,5,7). Could you please add a comment
> or even better defines for them?
>
> Thanks
>
>> + dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
>> +
>> /* Restart the Phy Clock */
>> dwc2_writel(0, hsotg->regs + PCGCTL);
>>
>
New version of this patch submitted with this name "[PATCH] usb: dwc2:
host: Fix transaction errors in host mode". So, this one could be ignored.
Thanks,
Minas
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