On 02/11/2016 02:03 PM, Petr Kulhavy wrote:
This adds DT support for TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver
Signed-off-by: Petr Kulhavy <p...@barix.com>
---
drivers/usb/musb/da8xx.c | 88 ++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
index b03d3b8..371fd74 100644
--- a/drivers/usb/musb/da8xx.c
+++ b/drivers/usb/musb/da8xx.c
[...]
+static inline int get_phy_refclk_cfg(struct device_node *np)
+{
+ u32 freq;
+
+ if (!of_property_read_u32(np, "ti,phy20-refclock-frequency", &freq))
+ return -EINVAL;
This function returns a negative error code on failure and 0 on success!
Did you test the patch at all?
[...]
@@ -482,6 +517,12 @@ static const struct platform_device_info da8xx_dev_info = {
.dma_mask = DMA_BIT_MASK(32),
};
+static const struct musb_hdrc_config da830_config = {
You may call it 'da8xx_config'. I'm pretty sure there won't be other
variants.
[...]
@@ -515,6 +557,43 @@ static int da8xx_probe(struct platform_device *pdev)
glue->dev = &pdev->dev;
glue->clk = clk;
+ if (IS_ENABLED(CONFIG_OF) && np) {
+ int phy20_refclk_cfg;
+ u32 cfgchip2;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ ret = -ENOMEM;
+ goto err5;
+ }
+
+ pdata->config = &da830_config;
+ pdata->mode = musb_get_mode(&pdev->dev);
+ pdata->power = musb_get_power(&pdev->dev);
+
+ cfgchip2 = __raw_readl(CFGCHIP2);
+ cfgchip2 &= ~CFGCHIP2_USB2PHYCLKMUX;
+ /* optional parameter reference clock source
+ * true = use PLL, false = use external clock pin
+ */
The kernel code (except the networking) prefers to format comments:
/*
* Like
* this.
*/
You used the networking style. :-)
+ if (of_property_read_bool(np, "ti,phy20-clkmux-pll"))
+ cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
+ __raw_writel(cfgchip2, CFGCHIP2);
+
+ phy20_refclk_cfg = get_phy_refclk_cfg(np);
+ if (phy20_refclk_cfg < 0) {
+ dev_err(&pdev->dev,
+ "PHY 2.0 clock frequency invalid or
undefined\n");
+ ret = -EINVAL;
+ goto err5;
+ }
+
+ cfgchip2 = __raw_readl(CFGCHIP2);
+ cfgchip2 &= ~CFGCHIP2_REFFREQ;
+ cfgchip2 |= phy20_refclk_cfg;
+ __raw_writel(cfgchip2, CFGCHIP2);
You can do everything in one read-modify-write, no need for intermediate
writre/readback.
[...]
MBR, Sergei
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