From: Fabio Estevam <fabio.este...@freescale.com>
Add support for the optional 'phy-clkgate-delay-us' property that is
used to describe the delay time between putting PHY into low power mode
and turning off the PHY clock.
Signed-off-by: Li Jun <jun...@freescale.com>
Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
---
drivers/usb/chipidea/core.c | 7 +++++++
include/linux/usb/chipidea.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 3feebf7..9469675 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -651,6 +651,10 @@ static int ci_get_platdata(struct device *dev,
if (of_usb_get_maximum_speed(dev->of_node) == USB_SPEED_FULL)
platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
+ if (of_find_property(dev->of_node, "phy-clkgate-delay-us", NULL))
+ of_property_read_u32(dev->of_node, "phy-clkgate-delay-us",
+ &platdata->phy_clkgate_delay_us);
+
platdata->itc_setting = 1;
if (of_find_property(dev->of_node, "itc-setting", NULL)) {
ret = of_property_read_u32(dev->of_node, "itc-setting",
@@ -996,6 +1000,9 @@ static void ci_controller_suspend(struct ci_hdrc *ci)
{
disable_irq(ci->irq);
ci_hdrc_enter_lpm(ci, true);
+ if (ci->platdata->phy_clkgate_delay_us)
+ usleep_range(ci->platdata->phy_clkgate_delay_us,
+ ci->platdata->phy_clkgate_delay_us + 50);
usb_phy_set_suspend(ci->usb_phy, 1);
ci->in_lpm = true;
enable_irq(ci->irq);
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index a41833c..32e8c9b 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -48,6 +48,7 @@ struct ci_hdrc_platform_data {
u32 ahb_burst_config;
u32 tx_burst_size;
u32 rx_burst_size;
+ u32 phy_clkgate_delay_us;
};
/* Default offset of capability registers */
--
1.9.1
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