cc Alexander

Thanks

On Thu, Jun 25, 2015 at 7:41 PM, Jayan John <jayanjoh...@gmail.com> wrote:
> I am developing a custom USB device on a iMX6q platform (Wandboard)
> Chipidea HDRC (highspeed dual role controller). The HID interface
> consists of a single Interrupt IN ep and ep0. It is required to send
> HID reports from Host to Gadget over ep0 (with set_report cmd on
> hidraw interface) in OUT direction. The size of each HID report is 64
> bytes.
>
> The Chipidea HDRC is unable to receive/ process the 64 bytes of data
> over ep0 (OUT). The setup stage is fine. No UDC interrupt is raised by
> controller to indicate completion of transaction. The same data
> transfer works fine for <64 bytes (63, 63 etc) and >64 bytes (65, 66
> etc) where the transfers are split as 64+n. Analyzer logs attached.
>
> 1. Is there an issue with Chipidea HDRC receiving wMaxPacketSize (i.e.
> 64 byte) aligned data transfers on ep0 in OUT direction?
> 2. Anything that needs to be configured/ added in descriptor or source
> to have completion interrupt hit on 64 bytes data transfer on ep0 OUT?
>
> THank you!!
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