On Fri, 9 Jan 2015, Peter Chen wrote:

> For chipidea, its resume sequence is not-EHCI compatible, see
> below description for FPR at portsc. So in order to send SoF in
> time for remote wakeup sequence(within 3ms), the RUN/STOP bit must
> be set before the resume signal is ended, but the usb resume
> code may run after resume signal is ended, so we had to set it
> at suspend path.
> 
> Force Port Resume - RW. Default = 0b.
> 1= Resume detected/driven on port.
> 0=No resume (K-state) detected/driven on port.
> Host mode:
> Software sets this bit to one to drive resume signaling. The Controller sets 
> this bit to '1' if
> a J-to-K transition is detected while the port is in the Suspend state. When 
> this bit
> transitions to a '1' because a J-to-K transition is detected, the Port Change 
> Detect bit in
> the USBSTS register is also set to '1'. This bit will automatically change to 
> '0' after the
> resume sequence is complete. This behavior is different from EHCI where the 
> controller
> driver is required to set this bit to a '0' after the resume duration is 
> timed in the driver.
> Note that when the controller owns the port, the resume sequence follows the 
> defined
> 
> sequence documented in the USB Specification Revision 2.0. The resume 
> signaling
> (Full-speed 'K') is driven on the port as long as this bit remains a '1'. 
> This bit will remain
> a '1' until the port has switched to idle. Writing a '0' has no affect 
> because the port
> controller will time the resume operation, clear the bit and the port control 
> state switches
> to HS or FS idle.
> This field is '0' if Port Power(PP) is '0' in host mode.
> 
> This bit is not-EHCI compatible.
> 
> Signed-off-by: Peter Chen <peter.c...@freescale.com>

Acked-by: Alan Stern <st...@rowland.harvard.edu>

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