Hi, On Fri, Oct 17, 2014 at 04:53:33PM +0800, Huang Rui wrote: > AMD NL needs to enable u2exit lfps quirk. > > Signed-off-by: Huang Rui <ray.hu...@amd.com> > --- > drivers/usb/dwc3/core.c | 4 ++++ > drivers/usb/dwc3/core.h | 1 + > drivers/usb/dwc3/dwc3-pci.c | 3 ++- > drivers/usb/dwc3/platform_data.h | 1 + > 4 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index 25db533..7322d85 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -467,6 +467,10 @@ static int dwc3_core_init(struct dwc3 *dwc) > reg |= DWC3_GCTL_DISSCRAMBLE; > else > reg &= ~DWC3_GCTL_DISSCRAMBLE; > + > + if (dwc->quirks & DWC3_QUIRK_U2EXIT_LFPS)
this should be:
if (dwc->u2_exit_lfps_quirk)
> + reg |= DWC3_GCTL_U2EXIT_LFPS;
> +
> /*
> * WORKAROUND: DWC3 revisions <1.90a have a bug
> * where the device can fail to connect at SuperSpeed
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index d58479e..3d27f10 100644
> --- a/drivers/usb/dwc3/core.h
> +++ b/drivers/usb/dwc3/core.h
> @@ -166,6 +166,7 @@
> #define DWC3_GCTL_SCALEDOWN(n) ((n) << 4)
> #define DWC3_GCTL_SCALEDOWN_MASK DWC3_GCTL_SCALEDOWN(3)
> #define DWC3_GCTL_DISSCRAMBLE (1 << 3)
> +#define DWC3_GCTL_U2EXIT_LFPS (1 << 2)
> #define DWC3_GCTL_GBLHIBERNATIONEN (1 << 1)
> #define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
>
> diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
> index bbe946c..cdb9b04 100644
> --- a/drivers/usb/dwc3/dwc3-pci.c
> +++ b/drivers/usb/dwc3/dwc3-pci.c
> @@ -149,7 +149,8 @@ static int dwc3_pci_probe(struct pci_dev *pci,
> if (pci->vendor == PCI_VENDOR_ID_AMD && pci->device ==
> PCI_DEVICE_ID_AMD_NL) {
> dwc3_pdata.has_lpm_erratum = true;
> - dwc3_pdata.quirks |= DWC3_QUIRK_AMD_NL;
> + dwc3_pdata.quirks |= DWC3_QUIRK_AMD_NL
> + | DWC3_QUIRK_U2EXIT_LFPS;
> }
should be combined and the last patch in the series.
--
balbi
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