On Mon, Oct 06, 2014 at 06:54:59PM +0300, Laurent Pinchart wrote: > The isp1760-rhcd.h header contains PTD constants and structures only > useful for the HCD implementation. It also contains register definitions > that will be needed by common code when implementing support for the > ISP1761 device controller, but doesn't contain the isp1760_hcd structure > definition that will also be used by common code. > > Move definitions to the right location and create an isp1760-regs.h to > store register definitions. No change other than moving definitions and > modifying indentation is performed. > > Signed-off-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Reviewed-by: Felipe Balbi <ba...@ti.com>
> ---
> drivers/usb/host/isp1760-hcd.c | 130 +++++++++++++----------
> drivers/usb/host/isp1760-hcd.h | 229
> +++++++++++-----------------------------
> drivers/usb/host/isp1760-if.c | 1 +
> drivers/usb/host/isp1760-regs.h | 120 +++++++++++++++++++++
> 4 files changed, 255 insertions(+), 225 deletions(-)
> create mode 100644 drivers/usb/host/isp1760-regs.h
>
> diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
> index 5695ffc..9c8cd37 100644
> --- a/drivers/usb/host/isp1760-hcd.c
> +++ b/drivers/usb/host/isp1760-hcd.c
> @@ -27,41 +27,12 @@
> #include <linux/gpio.h>
>
> #include "isp1760-hcd.h"
> +#include "isp1760-regs.h"
>
> static struct kmem_cache *qtd_cachep;
> static struct kmem_cache *qh_cachep;
> static struct kmem_cache *urb_listitem_cachep;
>
> -enum queue_head_types {
> - QH_CONTROL,
> - QH_BULK,
> - QH_INTERRUPT,
> - QH_END
> -};
> -
> -struct isp1760_hcd {
> - struct usb_hcd *hcd;
> -
> - u32 hcs_params;
> - spinlock_t lock;
> - struct isp1760_slotinfo atl_slots[32];
> - int atl_done_map;
> - struct isp1760_slotinfo int_slots[32];
> - int int_done_map;
> - struct isp1760_memory_chunk memory_pool[BLOCKS];
> - struct list_head qh_list[QH_END];
> -
> - /* periodic schedule support */
> -#define DEFAULT_I_TDPS 1024
> - unsigned periodic_size;
> - unsigned i_thresh;
> - unsigned long reset_done;
> - unsigned long next_statechange;
> - unsigned int devflags;
> -
> - int rst_gpio;
> -};
> -
> typedef void (packet_enqueue)(struct usb_hcd *hcd, struct isp1760_qh *qh,
> struct isp1760_qtd *qtd);
>
> @@ -70,32 +41,79 @@ static inline struct isp1760_hcd *hcd_to_priv(struct
> usb_hcd *hcd)
> return *(struct isp1760_hcd **)hcd->hcd_priv;
> }
>
> -/* Section 2.2 Host Controller Capability Registers */
> -#define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
> -#define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
> -#define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
> -#define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
> -#define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on
> HC */
> -#define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc
> frame */
> -#define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached
> */
> -
> -/* Section 2.3 Host Controller Operational Registers */
> -#define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
> -#define CMD_RESET (1<<1) /* reset HC not bus */
> -#define CMD_RUN (1<<0) /* start/stop HC */
> -#define STS_PCD (1<<2) /* port change detect */
> -#define FLAG_CF (1<<0) /* true: we'll support "high
> speed" */
> -
> -#define PORT_OWNER (1<<13) /* true: companion hc owns this port */
> -#define PORT_POWER (1<<12) /* true: has power (see PPC) */
> -#define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1
> device */
> -#define PORT_RESET (1<<8) /* reset port */
> -#define PORT_SUSPEND (1<<7) /* suspend port */
> -#define PORT_RESUME (1<<6) /* resume it */
> -#define PORT_PE (1<<2) /* port enable */
> -#define PORT_CSC (1<<1) /* connect status change */
> -#define PORT_CONNECT (1<<0) /* device connected */
> -#define PORT_RWC_BITS (PORT_CSC)
> +/* urb state*/
> +#define DELETE_URB (0x0008)
> +#define NO_TRANSFER_ACTIVE (0xffffffff)
> +
> +/* Philips Proprietary Transfer Descriptor (PTD) */
> +typedef __u32 __bitwise __dw;
> +struct ptd {
> + __dw dw0;
> + __dw dw1;
> + __dw dw2;
> + __dw dw3;
> + __dw dw4;
> + __dw dw5;
> + __dw dw6;
> + __dw dw7;
> +};
> +#define PTD_OFFSET 0x0400
> +#define ISO_PTD_OFFSET 0x0400
> +#define INT_PTD_OFFSET 0x0800
> +#define ATL_PTD_OFFSET 0x0c00
> +#define PAYLOAD_OFFSET 0x1000
> +
> +
> +/* ATL */
> +/* DW0 */
> +#define DW0_VALID_BIT 1
> +#define FROM_DW0_VALID(x) ((x) & 0x01)
> +#define TO_DW0_LENGTH(x) (((u32) x) << 3)
> +#define TO_DW0_MAXPACKET(x) (((u32) x) << 18)
> +#define TO_DW0_MULTI(x) (((u32) x) << 29)
> +#define TO_DW0_ENDPOINT(x) (((u32) x) << 31)
> +/* DW1 */
> +#define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3)
> +#define TO_DW1_PID_TOKEN(x) (((u32) x) << 10)
> +#define DW1_TRANS_BULK ((u32) 2 << 12)
> +#define DW1_TRANS_INT ((u32) 3 << 12)
> +#define DW1_TRANS_SPLIT ((u32) 1 << 14)
> +#define DW1_SE_USB_LOSPEED ((u32) 2 << 16)
> +#define TO_DW1_PORT_NUM(x) (((u32) x) << 18)
> +#define TO_DW1_HUB_NUM(x) (((u32) x) << 25)
> +/* DW2 */
> +#define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8)
> +#define TO_DW2_RL(x) ((x) << 25)
> +#define FROM_DW2_RL(x) (((x) >> 25) & 0xf)
> +/* DW3 */
> +#define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff)
> +#define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff)
> +#define TO_DW3_NAKCOUNT(x) ((x) << 19)
> +#define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf)
> +#define TO_DW3_CERR(x) ((x) << 23)
> +#define FROM_DW3_CERR(x) (((x) >> 23) & 0x3)
> +#define TO_DW3_DATA_TOGGLE(x) ((x) << 25)
> +#define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1)
> +#define TO_DW3_PING(x) ((x) << 26)
> +#define FROM_DW3_PING(x) (((x) >> 26) & 0x1)
> +#define DW3_ERROR_BIT (1 << 28)
> +#define DW3_BABBLE_BIT (1 << 29)
> +#define DW3_HALT_BIT (1 << 30)
> +#define DW3_ACTIVE_BIT (1 << 31)
> +#define FROM_DW3_ACTIVE(x) (((x) >> 31) & 0x01)
> +
> +#define INT_UNDERRUN (1 << 2)
> +#define INT_BABBLE (1 << 1)
> +#define INT_EXACT (1 << 0)
> +
> +#define SETUP_PID (2)
> +#define IN_PID (1)
> +#define OUT_PID (0)
> +
> +/* Errata 1 */
> +#define RL_COUNTER (0)
> +#define NAK_COUNTER (0)
> +#define ERR_COUNTER (2)
>
> struct isp1760_qtd {
> u8 packet_type;
> diff --git a/drivers/usb/host/isp1760-hcd.h b/drivers/usb/host/isp1760-hcd.h
> index 2a918d6..3ece078 100644
> --- a/drivers/usb/host/isp1760-hcd.h
> +++ b/drivers/usb/host/isp1760-hcd.h
> @@ -1,114 +1,30 @@
> #ifndef _ISP1760_HCD_H_
> #define _ISP1760_HCD_H_
>
> -/* exports for if */
> -int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
> - int rst_gpio, struct device *dev, unsigned int devflags);
> -void isp1760_unregister(struct device *dev);
> +#include <linux/spinlock.h>
>
> -int isp1760_init_kmem_once(void);
> -void isp1760_deinit_kmem_cache(void);
> +struct isp1760_qh;
> +struct isp1760_qtd;
> +struct resource;
> +struct usb_hcd;
>
> -/* EHCI capability registers */
> -#define HC_CAPLENGTH 0x00
> -#define HC_HCSPARAMS 0x04
> -#define HC_HCCPARAMS 0x08
> -
> -/* EHCI operational registers */
> -#define HC_USBCMD 0x20
> -#define HC_USBSTS 0x24
> -#define HC_FRINDEX 0x2c
> -#define HC_CONFIGFLAG 0x60
> -#define HC_PORTSC1 0x64
> -#define HC_ISO_PTD_DONEMAP_REG 0x130
> -#define HC_ISO_PTD_SKIPMAP_REG 0x134
> -#define HC_ISO_PTD_LASTPTD_REG 0x138
> -#define HC_INT_PTD_DONEMAP_REG 0x140
> -#define HC_INT_PTD_SKIPMAP_REG 0x144
> -#define HC_INT_PTD_LASTPTD_REG 0x148
> -#define HC_ATL_PTD_DONEMAP_REG 0x150
> -#define HC_ATL_PTD_SKIPMAP_REG 0x154
> -#define HC_ATL_PTD_LASTPTD_REG 0x158
> -
> -/* Configuration Register */
> -#define HC_HW_MODE_CTRL 0x300
> -#define ALL_ATX_RESET (1 << 31)
> -#define HW_ANA_DIGI_OC (1 << 15)
> -#define HW_DATA_BUS_32BIT (1 << 8)
> -#define HW_DACK_POL_HIGH (1 << 6)
> -#define HW_DREQ_POL_HIGH (1 << 5)
> -#define HW_INTR_HIGH_ACT (1 << 2)
> -#define HW_INTR_EDGE_TRIG (1 << 1)
> -#define HW_GLOBAL_INTR_EN (1 << 0)
> -
> -#define HC_CHIP_ID_REG 0x304
> -#define HC_SCRATCH_REG 0x308
> -
> -#define HC_RESET_REG 0x30c
> -#define SW_RESET_RESET_HC (1 << 1)
> -#define SW_RESET_RESET_ALL (1 << 0)
> -
> -#define HC_BUFFER_STATUS_REG 0x334
> -#define ISO_BUF_FILL (1 << 2)
> -#define INT_BUF_FILL (1 << 1)
> -#define ATL_BUF_FILL (1 << 0)
> -
> -#define HC_MEMORY_REG 0x33c
> -#define ISP_BANK(x) ((x) << 16)
> -
> -#define HC_PORT1_CTRL 0x374
> -#define PORT1_POWER (3 << 3)
> -#define PORT1_INIT1 (1 << 7)
> -#define PORT1_INIT2 (1 << 23)
> -#define HW_OTG_CTRL_SET 0x374
> -#define HW_OTG_CTRL_CLR 0x376
> -
> -/* Interrupt Register */
> -#define HC_INTERRUPT_REG 0x310
> -
> -#define HC_INTERRUPT_ENABLE 0x314
> -#define HC_ISO_INT (1 << 9)
> -#define HC_ATL_INT (1 << 8)
> -#define HC_INTL_INT (1 << 7)
> -#define HC_EOT_INT (1 << 3)
> -#define HC_SOT_INT (1 << 1)
> -#define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT)
> -
> -#define HC_ISO_IRQ_MASK_OR_REG 0x318
> -#define HC_INT_IRQ_MASK_OR_REG 0x31C
> -#define HC_ATL_IRQ_MASK_OR_REG 0x320
> -#define HC_ISO_IRQ_MASK_AND_REG 0x324
> -#define HC_INT_IRQ_MASK_AND_REG 0x328
> -#define HC_ATL_IRQ_MASK_AND_REG 0x32C
> -
> -/* urb state*/
> -#define DELETE_URB (0x0008)
> -#define NO_TRANSFER_ACTIVE (0xffffffff)
> -
> -/* Philips Proprietary Transfer Descriptor (PTD) */
> -typedef __u32 __bitwise __dw;
> -struct ptd {
> - __dw dw0;
> - __dw dw1;
> - __dw dw2;
> - __dw dw3;
> - __dw dw4;
> - __dw dw5;
> - __dw dw6;
> - __dw dw7;
> -};
> -#define PTD_OFFSET 0x0400
> -#define ISO_PTD_OFFSET 0x0400
> -#define INT_PTD_OFFSET 0x0800
> -#define ATL_PTD_OFFSET 0x0c00
> -#define PAYLOAD_OFFSET 0x1000
> +/*
> + * 60kb divided in:
> + * - 32 blocks @ 256 bytes
> + * - 20 blocks @ 1024 bytes
> + * - 4 blocks @ 8192 bytes
> + */
>
> -struct isp1760_slotinfo {
> - struct isp1760_qh *qh;
> - struct isp1760_qtd *qtd;
> - unsigned long timestamp;
> -};
> +#define BLOCK_1_NUM 32
> +#define BLOCK_2_NUM 20
> +#define BLOCK_3_NUM 4
>
> +#define BLOCK_1_SIZE 256
> +#define BLOCK_2_SIZE 1024
> +#define BLOCK_3_SIZE 8192
> +#define BLOCKS (BLOCK_1_NUM + BLOCK_2_NUM + BLOCK_3_NUM)
> +#define MAX_PAYLOAD_SIZE BLOCK_3_SIZE
> +#define PAYLOAD_AREA_SIZE 0xf000
>
> /*
> * Device flags that can vary from board to board. All of these
> @@ -125,6 +41,12 @@ struct isp1760_slotinfo {
> #define ISP1760_FLAG_INTR_EDGE_TRIG 0x00000100 /* Interrupt edge triggered
> */
> #define ISP1760_FLAG_RESET_ACTIVE_HIGH 0x80000000 /* RESET GPIO active
> high */
>
> +struct isp1760_slotinfo {
> + struct isp1760_qh *qh;
> + struct isp1760_qtd *qtd;
> + unsigned long timestamp;
> +};
> +
> /* chip memory management */
> struct isp1760_memory_chunk {
> unsigned int start;
> @@ -132,73 +54,42 @@ struct isp1760_memory_chunk {
> unsigned int free;
> };
>
> -/*
> - * 60kb divided in:
> - * - 32 blocks @ 256 bytes
> - * - 20 blocks @ 1024 bytes
> - * - 4 blocks @ 8192 bytes
> - */
> +enum isp1760_queue_head_types {
> + QH_CONTROL,
> + QH_BULK,
> + QH_INTERRUPT,
> + QH_END
> +};
>
> -#define BLOCK_1_NUM 32
> -#define BLOCK_2_NUM 20
> -#define BLOCK_3_NUM 4
> +struct isp1760_hcd {
> + struct usb_hcd *hcd;
> +
> + u32 hcs_params;
> + spinlock_t lock;
> + struct isp1760_slotinfo atl_slots[32];
> + int atl_done_map;
> + struct isp1760_slotinfo int_slots[32];
> + int int_done_map;
> + struct isp1760_memory_chunk memory_pool[BLOCKS];
> + struct list_head qh_list[QH_END];
> +
> + /* periodic schedule support */
> +#define DEFAULT_I_TDPS 1024
> + unsigned periodic_size;
> + unsigned i_thresh;
> + unsigned long reset_done;
> + unsigned long next_statechange;
> + unsigned int devflags;
> +
> + int rst_gpio;
> +};
>
> -#define BLOCK_1_SIZE 256
> -#define BLOCK_2_SIZE 1024
> -#define BLOCK_3_SIZE 8192
> -#define BLOCKS (BLOCK_1_NUM + BLOCK_2_NUM + BLOCK_3_NUM)
> -#define MAX_PAYLOAD_SIZE BLOCK_3_SIZE
> -#define PAYLOAD_AREA_SIZE 0xf000
> +/* exports for if */
> +int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
> + int rst_gpio, struct device *dev, unsigned int devflags);
> +void isp1760_unregister(struct device *dev);
>
> -/* ATL */
> -/* DW0 */
> -#define DW0_VALID_BIT 1
> -#define FROM_DW0_VALID(x) ((x) & 0x01)
> -#define TO_DW0_LENGTH(x) (((u32) x) << 3)
> -#define TO_DW0_MAXPACKET(x) (((u32) x) << 18)
> -#define TO_DW0_MULTI(x) (((u32) x) << 29)
> -#define TO_DW0_ENDPOINT(x) (((u32) x) << 31)
> -/* DW1 */
> -#define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3)
> -#define TO_DW1_PID_TOKEN(x) (((u32) x) << 10)
> -#define DW1_TRANS_BULK ((u32) 2 << 12)
> -#define DW1_TRANS_INT ((u32) 3 << 12)
> -#define DW1_TRANS_SPLIT ((u32) 1 << 14)
> -#define DW1_SE_USB_LOSPEED ((u32) 2 << 16)
> -#define TO_DW1_PORT_NUM(x) (((u32) x) << 18)
> -#define TO_DW1_HUB_NUM(x) (((u32) x) << 25)
> -/* DW2 */
> -#define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8)
> -#define TO_DW2_RL(x) ((x) << 25)
> -#define FROM_DW2_RL(x) (((x) >> 25) & 0xf)
> -/* DW3 */
> -#define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff)
> -#define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff)
> -#define TO_DW3_NAKCOUNT(x) ((x) << 19)
> -#define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf)
> -#define TO_DW3_CERR(x) ((x) << 23)
> -#define FROM_DW3_CERR(x) (((x) >> 23) & 0x3)
> -#define TO_DW3_DATA_TOGGLE(x) ((x) << 25)
> -#define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1)
> -#define TO_DW3_PING(x) ((x) << 26)
> -#define FROM_DW3_PING(x) (((x) >> 26) & 0x1)
> -#define DW3_ERROR_BIT (1 << 28)
> -#define DW3_BABBLE_BIT (1 << 29)
> -#define DW3_HALT_BIT (1 << 30)
> -#define DW3_ACTIVE_BIT (1 << 31)
> -#define FROM_DW3_ACTIVE(x) (((x) >> 31) & 0x01)
> -
> -#define INT_UNDERRUN (1 << 2)
> -#define INT_BABBLE (1 << 1)
> -#define INT_EXACT (1 << 0)
> -
> -#define SETUP_PID (2)
> -#define IN_PID (1)
> -#define OUT_PID (0)
> -
> -/* Errata 1 */
> -#define RL_COUNTER (0)
> -#define NAK_COUNTER (0)
> -#define ERR_COUNTER (2)
> +int isp1760_init_kmem_once(void);
> +void isp1760_deinit_kmem_cache(void);
>
> #endif /* _ISP1760_HCD_H_ */
> diff --git a/drivers/usb/host/isp1760-if.c b/drivers/usb/host/isp1760-if.c
> index 891d853..2880604 100644
> --- a/drivers/usb/host/isp1760-if.c
> +++ b/drivers/usb/host/isp1760-if.c
> @@ -17,6 +17,7 @@
> #include <linux/usb/hcd.h>
>
> #include "isp1760-hcd.h"
> +#include "isp1760-regs.h"
>
> #if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ)
> #include <linux/slab.h>
> diff --git a/drivers/usb/host/isp1760-regs.h b/drivers/usb/host/isp1760-regs.h
> new file mode 100644
> index 0000000..c2a3900
> --- /dev/null
> +++ b/drivers/usb/host/isp1760-regs.h
> @@ -0,0 +1,120 @@
> +/*
> + * Driver for the NXP ISP1760 chip
> + *
> + * Copyright 2014 Laurent Pinchart
> + * Copyright 2007 Sebastian Siewior
> + *
> + * Contacts:
> + * Sebastian Siewior <bige...@linutronix.de>
> + * Laurent Pinchart <laurent.pinch...@ideasonboard.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + */
> +
> +#ifndef _ISP1760_REGS_H_
> +#define _ISP1760_REGS_H_
> +
> +/* EHCI capability registers */
> +#define HC_CAPLENGTH 0x000
> +#define HC_LENGTH(p) (((p) >> 00) & 0x00ff) /* bits 7:0 */
> +#define HC_VERSION(p) (((p) >> 16) & 0xffff) /* bits 31:16 */
> +
> +#define HC_HCSPARAMS 0x004
> +#define HCS_INDICATOR(p) ((p) & (1 << 16)) /* true: has port
> indicators */
> +#define HCS_PPC(p) ((p) & (1 << 4)) /* true: port power
> control */
> +#define HCS_N_PORTS(p) (((p) >> 0) & 0xf) /* bits 3:0,
> ports on HC */
> +
> +#define HC_HCCPARAMS 0x008
> +#define HCC_ISOC_CACHE(p) ((p) & (1 << 7)) /* true: can cache isoc
> frame */
> +#define HCC_ISOC_THRES(p) (((p) >> 4) & 0x7) /* bits 6:4, uframes
> cached */
> +
> +/* EHCI operational registers */
> +#define HC_USBCMD 0x020
> +#define CMD_LRESET (1 << 7) /* partial reset (no
> ports, etc) */
> +#define CMD_RESET (1 << 1) /* reset HC not bus */
> +#define CMD_RUN (1 << 0) /* start/stop
> HC */
> +
> +#define HC_USBSTS 0x024
> +#define STS_PCD (1 << 2) /* port change
> detect */
> +
> +#define HC_FRINDEX 0x02c
> +
> +#define HC_CONFIGFLAG 0x060
> +#define FLAG_CF (1 << 0) /* true: we'll
> support "high speed" */
> +
> +#define HC_PORTSC1 0x064
> +#define PORT_OWNER (1 << 13) /* true: companion hc
> owns this port */
> +#define PORT_POWER (1 << 12) /* true: has power (see
> PPC) */
> +#define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10))
> /* USB 1.1 device */
> +#define PORT_RESET (1 << 8) /* reset port */
> +#define PORT_SUSPEND (1 << 7) /* suspend port */
> +#define PORT_RESUME (1 << 6) /* resume it */
> +#define PORT_PE (1 << 2) /* port enable
> */
> +#define PORT_CSC (1 << 1) /* connect status
> change */
> +#define PORT_CONNECT (1 << 0) /* device connected */
> +#define PORT_RWC_BITS (PORT_CSC)
> +
> +#define HC_ISO_PTD_DONEMAP_REG 0x130
> +#define HC_ISO_PTD_SKIPMAP_REG 0x134
> +#define HC_ISO_PTD_LASTPTD_REG 0x138
> +#define HC_INT_PTD_DONEMAP_REG 0x140
> +#define HC_INT_PTD_SKIPMAP_REG 0x144
> +#define HC_INT_PTD_LASTPTD_REG 0x148
> +#define HC_ATL_PTD_DONEMAP_REG 0x150
> +#define HC_ATL_PTD_SKIPMAP_REG 0x154
> +#define HC_ATL_PTD_LASTPTD_REG 0x158
> +
> +/* Configuration Register */
> +#define HC_HW_MODE_CTRL 0x300
> +#define ALL_ATX_RESET (1 << 31)
> +#define HW_ANA_DIGI_OC (1 << 15)
> +#define HW_DATA_BUS_32BIT (1 << 8)
> +#define HW_DACK_POL_HIGH (1 << 6)
> +#define HW_DREQ_POL_HIGH (1 << 5)
> +#define HW_INTR_HIGH_ACT (1 << 2)
> +#define HW_INTR_EDGE_TRIG (1 << 1)
> +#define HW_GLOBAL_INTR_EN (1 << 0)
> +
> +#define HC_CHIP_ID_REG 0x304
> +#define HC_SCRATCH_REG 0x308
> +
> +#define HC_RESET_REG 0x30c
> +#define SW_RESET_RESET_HC (1 << 1)
> +#define SW_RESET_RESET_ALL (1 << 0)
> +
> +#define HC_BUFFER_STATUS_REG 0x334
> +#define ISO_BUF_FILL (1 << 2)
> +#define INT_BUF_FILL (1 << 1)
> +#define ATL_BUF_FILL (1 << 0)
> +
> +#define HC_MEMORY_REG 0x33c
> +#define ISP_BANK(x) ((x) << 16)
> +
> +#define HC_PORT1_CTRL 0x374
> +#define PORT1_POWER (3 << 3)
> +#define PORT1_INIT1 (1 << 7)
> +#define PORT1_INIT2 (1 << 23)
> +#define HW_OTG_CTRL_SET 0x374
> +#define HW_OTG_CTRL_CLR 0x376
> +
> +/* Interrupt Register */
> +#define HC_INTERRUPT_REG 0x310
> +
> +#define HC_INTERRUPT_ENABLE 0x314
> +#define HC_ISO_INT (1 << 9)
> +#define HC_ATL_INT (1 << 8)
> +#define HC_INTL_INT (1 << 7)
> +#define HC_EOT_INT (1 << 3)
> +#define HC_SOT_INT (1 << 1)
> +#define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT)
> +
> +#define HC_ISO_IRQ_MASK_OR_REG 0x318
> +#define HC_INT_IRQ_MASK_OR_REG 0x31c
> +#define HC_ATL_IRQ_MASK_OR_REG 0x320
> +#define HC_ISO_IRQ_MASK_AND_REG 0x324
> +#define HC_INT_IRQ_MASK_AND_REG 0x328
> +#define HC_ATL_IRQ_MASK_AND_REG 0x32c
> +
> +#endif
> --
> 2.0.4
>
--
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