On Wed, 7 Aug 2013, Jussi Kivilinna wrote: > rtl8150 allocates URB transfer_buffer and setup_packet as part of same > structure 'struct async_req'. This can cause same cacheline to be > DMA-mapped twice with same URB. This can lead to memory corruption on > some systems.
I can see performance impact due to the double mapping. However, memory corruption seems a bit too much for sane cache and DMA controllers. Out of interest - which is the architecture that will potentially corrupt the memory. cheers, Petko -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
