Hi Shengzhou/Braun, We changed the controller init sequence to make this work. I'll submit the patch upstream soon.
Regards, Ramneek -----Original Message----- From: Liu Shengzhou-B36685 Sent: Monday, May 20, 2013 9:07 AM To: Michael Braun; Mehresh Ramneek-B31383 Cc: projekt-w...@fem.tu-ilmenau.de; Greg Kroah-Hartman; linux-usb@vger.kernel.org; Alan Stern; linux-ker...@vger.kernel.org Subject: RE: Regression in 3735ba8db8e6ea22ad3ff524328926d8d780a884 with Freescale P1020 Hi Braun, At that time I had an P4080DS board which had the same issue and had been fixed with this patch. I didn't test it on P1020 due to the absence of P1020. I think P1020 will need a new patch besides this one. Later Ramneek took this issue on P1020 for more investigation. Hello Ramneek, any update for the PHY_CLK_VALID issue? Regards, Shengzhou > -----Original Message----- > From: Michael Braun [mailto:michael.br...@fem.tu-ilmenau.de] > Sent: Sunday, May 19, 2013 11:23 PM > To: Liu Shengzhou-B36685 > Cc: projekt-w...@fem.tu-ilmenau.de; Greg Kroah-Hartman; linux- > u...@vger.kernel.org; Alan Stern; linux-ker...@vger.kernel.org > Subject: Re: Regression in 3735ba8db8e6ea22ad3ff524328926d8d780a884 > with Freescale P1020 > > Hi, > > I've got hardware here to test with, so if there any changes to test, > I'm willing to support. > Meanwhile, might it be a good idea to make that check optional - i.e. > add a module parameter or something like this around it? > > Regards, > M. Braun > > On Thu, Apr 18, 2013 at 05:13:39PM +0200, michael-dev wrote: > > Hi, > > > > thanks for the quick reply. > > > > >Please review the patch http://patchwork.ozlabs.org/patch/237201/ > > I applied it, but it does not make any difference on my platform. > > > > Regards, > > M. Braun > > > > Am 17.04.2013 12:53, schrieb Liu Shengzhou-B36685: > > >Hi Braun, > > > > > >It seems the duplicated tdi_reset caused the PHY_CLK_VALID bit > > >unstable, introduced by patch "EHCI: centralize controller > > >initialization". > > >I submitted a patch to fix it. > > >Please review the patch http://patchwork.ozlabs.org/patch/237201/ > > > > > >Regards, > > >Shengzhou > > > > > > > > >>-----Original Message----- > > >>From: Michael Braun [mailto:michael-...@fami-braun.de] > > >>Sent: Wednesday, April 17, 2013 6:08 PM > > >>To: Liu Shengzhou-B36685 > > >>Cc: Alan Stern; projekt-w...@fem.tu-ilmenau.de; Greg > > >>Kroah-Hartman; linux-usb@vger.kernel.org; > > >>linux-ker...@vger.kernel.org > > >>Subject: Regression in 3735ba8db8e6ea22ad3ff524328926d8d780a884 > > >>with Freescale P1020 > > >> > > >>Hi, > > >> > > >>I'm running OpenWRT Kernel 3.8.3 (which already has > > >>f66dea709cd9309b2ee9f715697818001fb518de and > > >>5ed338778f917a035f0f0a52327fc4f72e36f7a1 applied) on a P1020WLAN > > >>(QorlQ, > > >>PPC) device. > > >>Before updating the kernel from 3.3.0, USB host support was > > >>working fine. > > >>Now I get "fsl-ehci: USB PHY clock invalid" messages in dmesg and > > >>the lsusb output is empty, so USB host support is not working. > > >>When I apply the following patch, USB host support starts working > > >>again, so I guess > > >>3735ba8db8e6ea22ad3ff524328926d8d780a884 is the cause. > > >>Do you have an idea how to fix it more appropriately? > > >> > > >>Thanks, > > >> M. Braun > > >> > > >>--- a/drivers/usb/host/ehci-fsl.c 2013-04-15 21:13:52.924403077 > > >>+0200 > > >>+++ b/drivers/usb/host/ehci-fsl.c 2013-04-15 21:13:57.572410838 > > >>+0200 > > >>@@ -273,7 +273,6 @@ static int ehci_fsl_setup_phy(struct usb > > >> if (!spin_event_timeout(in_be32(non_ehci + > > >>FSL_SOC_USB_CTRL) & > > >> PHY_CLK_VALID, > > >>FSL_USB_PHY_CLK_TIMEOUT, > > >>0)) { > > >> printk(KERN_WARNING "fsl-ehci: USB PHY > > >>clock invalid\n"); > > >>- return -EINVAL; > > >> } > > >> } > > >> -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
