Hi Sergei,
On Wed, May 15, 2019 at 10:39 AM Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
> On 15.05.2019 10:35, Geert Uytterhoeven wrote:
> >> Document the USB_X1 input and add clock-names to identify
> >> functional and USB_X1 clocks.
> >>
> >> Signed-off-by: Chris Brandt <chris.bra...@renesas.com>
> >
> > Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
> >
> >> --- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
> >> +++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
> >> @@ -28,7 +28,11 @@ Required properties:
> >> followed by the generic version.
> >>
> >> - reg: offset and length of the partial USB 2.0 Host register block.
> >> -- clocks: clock phandle and specifier pair(s).
> >> +- clocks: clock phandle and specifier pair(s). For SoCs that have a
> >> separate
> >> + dedicated USB_X1 input for the PLL, that is also listed.
> >> +- clock-names: Name of the clocks. The functional clock shall be called
> >> "fclk"
> >
> > Names?
>
> And I think the module clock name was "fck", not "fclk"...
Indeed, sorry for missing that.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
