Back around the 4.13 timeframe, we tried to address a rather bad issue
with the Renesas uPD72020x USB3 controller family, that have a
horrible issue with the programming of the base addresses which tend
to stick on XHCI reset. This makes transitionning from 64bit to 32bit
addresses completely unsafe. This was observed on a fairly popular
arm64 platform (AMD Opteron 1100, which has all of its memory above
4GB).
The fixe was to perform a PCI reset of the device, but we have
multiple reports that this generated regressions (the controller not
being usable after the patch was applied).
This series reverts the problematic patch, and tries to address it in
a more constrained way. If the controller is behind an IOMMU (and only
in that case), we zero its base addresses before reseting it. In the
affected configuration, this has the effect of putting the device in a
state where the XHCI reset will be effective.
It must be noted that in the absence of an IOMMU (and maybe even in
its presence), this device is completely unsafe, and may silently
corrupt memory.
Marc Zyngier (3):
xhci: Allow more than 32 quirks
xhci: Add quirk to zero 64bit registers on Renesas PCIe controllers
Revert "xhci: Reset Renesas uPD72020x USB controller for 32-bit DMA
issue"
drivers/usb/host/pci-quirks.c | 20 -------------
drivers/usb/host/pci-quirks.h | 1 -
drivers/usb/host/xhci-pci.c | 15 ++++------
drivers/usb/host/xhci.c | 65 +++++++++++++++++++++++++++++++++++++++++--
drivers/usb/host/xhci.h | 3 +-
5 files changed, 70 insertions(+), 34 deletions(-)
--
2.14.2
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