On Wed, 6 Feb 2008, Thomi Aurel RUAG A wrote:

> Hy
> 
> After further tests with the usb gadget serial on the pxa27x (see my previous 
> postings "USB gadget serial on PXA-270") i think i'm able to address the 
> problem more precisly.
> It seems that the class request SET_LINE_CODING is handled by the gadget 
> driver _before_ its data OUT stage. That lead to a wrong/empty buffer of the 
> usb request at the time the request is handled by the gadget driver 
> (gs_setup_class).
> I guess that every control transfer with a data OUT stage is handled 
> incorrect (within this pxa27x_udc).
> 
> Only considering the pxa27x_udc_irq and handle_ep0 functions:

I don't have a PXA27x, but all controller drivers should handle this 
the same way.

> 1.a pxa27x_udc_irq gets an SETUP packet and calls handle_ep0
> 1.b handle_ep0 pass it to the gadget specific setup function (as it is done 
> now)
> 1.c setup function handles class request (as it is done now)

It _starts_ to handle the class request.  If the request involves a 
data-OUT transfer, the setup function must call usb_ep_queue() to 
submit a request for that data.

> 2.a pxa27x_udc_irq gets an DATA OUT packet (in the data stage) and do what? 
> Should it pass it to handle_ep0?

No.  It should use the data to complete the request just submitted.  If 
no request has been submitted then it should either NAK the DATA OUT 
packet or save it in an internal buffer.

> 2.b handle_ep0 pass it to the gadget specific setup function (as it should 
> be?)
> 2.c setup function handles class request (this time with a valid request 
> buffer)

2.b and 2.c are completely wrong.  Instead, the request's completion 
routine is called.  That routine should finish processing the class 
request.

> 3. pxa27x should send a Handshake packet

Not until the completion routine has finished processing the class 
request and returned.

> What would be the right procedure for such an control transfer (with a data 
> OUT stage)?
> How can the handling of the class specific request be delayed after the data 
> OUT stage?
> 
> Or does i misunderstand the control transfer and its stages?
> I think there are more issues about the pxa27x_udc but this one seems the 
> most significant to me.

Does this explanation help?

Alan Stern

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