On Thu, Nov 15, 2012 at 11:31 AM, Frank Schäfer <fschaefer....@googlemail.com> wrote: > Hmm... I've made some experiments to find out what gcc does on x86 and > it seems to ignore bit shifting > 32. > I also noticed that this line has been removed in 3.7-rc. > So we do NOT want to halve the height for interlaced devices here, right ?
Even with the datasheets, it was never clear to me what role the accumulator size played. It appeared to work regardless of whether it was halved (although making it zero obviously caused problems). Hence, since we couldn't see any visible difference, Mauro just removed the code. My guess is that it effects the on-chip internal buffering hence it's possible that performance/reliability could be effected under extreme load or some edge case, but I don't have any data to back up that assertion at this time. Devin -- Devin J. Heitmueller - Kernel Labs http://www.kernellabs.com -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
