Hi Luis,
Thank you for the patch.
On Tuesday, 13 November 2018 12:00:22 EET Luis de Oliveira wrote:
> On 24-Oct-18 18:40, Rob Herring wrote:
> > On Fri, Oct 19, 2018 at 02:52:25PM +0200, Luis Oliveira wrote:
> >> Add bindings for Synopsys DesignWare MIPI CSI-2 host.
> >>
> >> Signed-off-by: Luis Oliveira <loli...@synopsys.com>
> >> ---
> >> Changelog
> >> v2-V3
> >> - removed IPI settings
> >>
> >> .../devicetree/bindings/media/snps,dw-csi-plat.txt | 52 ++++++++++++++++
> >> 1 file changed, 52 insertions(+)
> >> create mode 100644
> >> Documentation/devicetree/bindings/media/snps,dw-csi-plat.txt>>
> >> diff --git a/Documentation/devicetree/bindings/media/snps,dw-csi-plat.txt
> >> b/Documentation/devicetree/bindings/media/snps,dw-csi-plat.txt new file
> >> mode 100644
> >> index 0000000..be3da05
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/media/snps,dw-csi-plat.txt
> >> @@ -0,0 +1,52 @@
> >> +Synopsys DesignWare CSI-2 Host controller
> >> +
> >> +Description
> >> +-----------
> >> +
> >> +This HW block is used to receive image coming from an MIPI CSI-2
> >> compatible +camera.
> >> +
> >> +Required properties:
> >> +- compatible: shall be "snps,dw-csi-plat"
> >
> > 'plat' is really part of the name of the h/w block?
>
> It is the name of the platform driver for CSI compatible with this block. Is
> that wrong?
DT bindings describe hardware, not drivers. This should be the name of the IP
core, regardless of how the drivers are architectured and named.
> >> +- reg : physical base address and size of the device
> >> memory
> >> mapped
> >> + registers;
> >> +- interrupts : CSI-2 Host interrupt
> >> +- snps,output-type : Core output to be used (IPI-> 0 or IDI->1 or
> >> BOTH->2)
> >> + These values choose which of the Core outputs will
> >> be used,
> >> + it can be Image Data Interface or Image Pixel
> >> Interface.
Does this describe what outputs the IP core has been instantiated
(synthesized) with, or what output(s) are used at runtime ? How does that
relate to the port nodes ?
> >> +- phys : List of one PHY specifier (as defined in
> >> +
> >> Documentation/devicetree/bindings/phy/phy-bindings.txt).
> >> + This PHY is a MIPI DPHY working in RX mode.
> >> +- resets : Reference to a reset controller (optional)
> >> +
> >> +The per-board settings:
> >> + - port sub-node describing a single endpoint connected to the camera as
> >> + described in video-interfaces.txt[1].
> >
> > Need to say 2 ports and what is each port? Why no port #0?
>
> I will elaborate on that.
>
> >> +
> >> +Example:
> >> +
> >> + csi2_1: csi2@3000 {
> >> + compatible = "snps,dw-csi-plat";
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> + reg = < 0x03000 0x7FF>;
> >> + interrupts = <2>;
> >> + output-type = <2>;
> >> + resets = <&dw_rst 1>;
> >> + phys = <&mipi_dphy_rx1 0>;
> >> + phy-names = "csi2-dphy";
> >
> > Not documented. Not really needed for a single entry, so I'd just drop
> > it.
>
> I will, thanks.
>
> >> +
> >> + /* CSI-2 per-board settings */
> >> + port@1 {
> >> + reg = <1>;
> >> + csi1_ep1: endpoint {
> >> + remote-endpoint = <&camera_1>;
> >> + data-lanes = <1 2>;
> >> + };
> >> + };
> >> + port@2 {
> >> + csi1_ep2: endpoint {
> >> + remote-endpoint = <&vif1_ep>;
> >> + };
> >> + };
> >> + };
--
Regards,
Laurent Pinchart
