On Mon, Dec 11, 2017 at 6:41 PM, Jose Abreu <jose.ab...@synopsys.com> wrote: > This is an initial submission for the Synopsys DesignWare HDMI RX > Controller Driver. This driver interacts with a phy driver so that > a communication between them is created and a video pipeline is > configured. > > The controller + phy pipeline can then be integrated into a fully > featured system that can be able to receive video up to 4k@60Hz > with deep color 48bit RGB, depending on the platform. Although, > this initial version does not yet handle deep color modes. > > This driver was implemented as a standard V4L2 subdevice and its > main features are: > - Internal state machine that reconfigures phy until the > video is not stable > - JTAG communication with phy > - Inter-module communication with phy driver > - Debug write/read ioctls > > Some notes: > - RX sense controller (cable connection/disconnection) must > be handled by the platform wrapper as this is not integrated > into the controller RTL > - The same goes for EDID ROM's > - ZCAL calibration is needed only in FPGA platforms, in ASIC > this is not needed > - The state machine is not an ideal solution as it creates a > kthread but it is needed because some sources might not be > very stable at sending the video (i.e. we must react > accordingly). > > Signed-off-by: Jose Abreu <joab...@synopsys.com> > Cc: Joao Pinto <jpi...@synopsys.com> > Cc: Mauro Carvalho Chehab <mche...@kernel.org> > Cc: Hans Verkuil <hans.verk...@cisco.com> > Cc: Sylwester Nawrocki <snawro...@kernel.org> > Cc: Sakari Ailus <sakari.ai...@iki.fi> > Cc: Philippe Ombredanne <pombreda...@nexb.com> > --- > Changes from v9: > - Use SPDX License ID (Philippe)
Acked-by: Philippe Ombredanne <pombreda...@nexb.com>
