On Thu, Aug 6, 2009 at 6:25 PM, Russell King - ARM
Linux<li...@arm.linux.org.uk> wrote:
[...]
> As far as userspace DMA coherency, the only way you could do it with
> current kernel APIs is by using get_user_pages(), creating a scatterlist
> from those, and then passing it to dma_map_sg().  While the device has
> ownership of the SG, userspace must _not_ touch the buffer until after
> DMA has completed.
[...]

Would that work on a processor with VIVT caches?  It seems not.  In
particular, dma_map_page uses page_address to get a virtual address to
pass to map_single().  map_single() in turn uses this address to
perform cache maintenance.  Since page_address() returns the kernel
virtual address, I don't see how any cache-lines for the userspace
virtual address would get invalidated (for the DMA_FROM_DEVICE case).

If that's true, then what is the correct way to allow DMA to/from a
userspace buffer with a VIVT cache?  If not true, what am I missing?

Thanks
-- 
-Steven Walter <stevenrwal...@gmail.com>
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