Russell King - ARM Linux wrote:
> On Fri, Aug 07, 2009 at 09:58:30AM +0200, Laurent Pinchart wrote:
> > Sorry about this, but I'm not sure to understand the speculative 
> > prefetching 
> > cache issue completely.
> 
> The general case with speculative prefetching is that if memory is
> accessible, it can be prefetched.
> 
> In other words, if we mapped devices without NX (non-exec) set, the
> CPU can prefetch instructions from devices, causing random read
> accesses.  Yes, I know it sounds crazy, but that's what I'm told
> _can_ happen.

1. Does the architecture not prevent speculative instruction
prefetches from crossing a page boundary?  It would be handy under the
circumstances.

2. Is NX available on all the CPUs with speculative prefetching
behaviour?  If it is, just use that for device mappings?

-- Jamie
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