On Fri, Feb 27, 2026 at 11:19:33AM +0800, Yifan Wu wrote: > The FEAT_SVE2p1 is indicated by ID_AA64ZFR0_EL1.SVEver. However, > the BFADD requires the FEAT_SVE_B16B16, which is indicated by > ID_AA64ZFR0_EL1.B16B16. This could cause the test to incorrectly > fail on a CPU that supports FEAT_SVE2.1 but not FEAT_SVE_B16B16. > > LD1Q Gather load quadwords which is decoded from SVE encodings and > implied by FEAT_SVE2p1.
Ah, good spot - I think my search for instructions to use got confused
by them mention of SVE2 in the description of BFADD. Since this is a
fix it should really be patch 1.
> - /* BFADD Z0.H, Z0.H, Z0.H */
> - asm volatile(".inst 0x65000000" : : : "z0");
> + /* LD1Q Z0.Q, P0/Z, Z0.D, X0 */
That should be:
LD1Q {Z0.Q}, P0/Z, [Z0.D, X0]
(the existing asm has some issues which we ought to get round fixing but
may as well keep the new stuff good.)
> + asm volatile(".inst 0xC400A000" : : : "z0");
Verified the decode with objdump. With the above change to the comment:
Reviewed-by: Mark Brown <[email protected]>
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