On Mon, May 26, 2025 at 10:16 AM Jason Gunthorpe <j...@nvidia.com> wrote: > > On Fri, May 23, 2025 at 11:29:53PM +0000, David Matlack wrote: > > From: Josh Hilke <jrhi...@google.com> > > > > Update vfio dma mapping test to verify that the IOMMU uses 2M and 1G > > mappings when 2M and 1G HugeTLB pages are mapped into a device > > respectively. > > > > This validation is done by inspecting the contents of the I/O page > > tables via /sys/kernel/debug/iommu/intel/. This validation is skipped if > > that directory is not available (i.e. non-Intel IOMMUs). > > > > Signed-off-by: Josh Hilke <jrhi...@google.com> > > [reword commit message, refactor code] > > Signed-off-by: David Matlack <dmatl...@google.com> > > --- > > .../selftests/vfio/vfio_dma_mapping_test.c | 126 +++++++++++++++++- > > 1 file changed, 119 insertions(+), 7 deletions(-) > > FWIW, I'm thinking to add an iommufd ioctl to report back on the # of > PTEs of each page size within a range. This would be after we get the > new page table stuff merged.
Thanks for the heads up. We are using Intel DebugFS because it's available and better than nothing, but a generic way to validate mappings sizes would be way better.
