Hi,

On Fri, Oct 09, 2015 at 03:51:22PM +0800, yalin wang wrote:
> This patch change some bool variables in struct regmap {  }
> to be u8 v : 1 type, so that we can shrink the sizeof of struct regmap.
> 
> Signed-off-by: yalin wang <yalin.wang2...@gmail.com>
> ---
>  drivers/base/regmap/internal.h | 39 +++++++++++++++++++--------------------
>  1 file changed, 19 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h
> index 3df9770..dac341c 100644
> --- a/drivers/base/regmap/internal.h
> +++ b/drivers/base/regmap/internal.h
> @@ -68,7 +68,6 @@ struct regmap {
>       void *bus_context;
>       const char *name;
>  
> -     bool async;
>       spinlock_t async_lock;
>       wait_queue_head_t async_waitq;
>       struct list_head async_list;
> @@ -102,8 +101,26 @@ struct regmap {
>       int (*reg_update_bits)(void *context, unsigned int reg,
>                              unsigned int mask, unsigned int val);
>  
> -     bool defer_caching;
> +     u8 async:1;
> +     u8 defer_caching:1;
> +     /* if set, remember to free reg_defaults_raw */
> +     u8 cache_free:1;
> +     /* if set, the HW registers are known to match map->reg_defaults */
> +     u8 no_sync_defaults:1;
>  
> +     /* if set, converts bulk read to single read */
> +     u8 use_single_read:1;
> +     /* if set, converts bulk read to single read */
> +     u8 use_single_write:1;
> +     /* if set, the device supports multi write mode */
> +     u8 can_multi_write:1;
> +
> +     /* if set, only the cache is modified not the HW */
> +     bool cache_only;
> +     /* if set, only the HW is modified not the cache */
> +     bool cache_bypass;
> +     /* if set, the cache contains newer data than the HW */
> +     bool cache_dirty;

Why are these last three variables just moved and not changed to u8 of
size 1?

Regards,

Markus

>       u8 read_flag_mask;
>       u8 write_flag_mask;
>  
> @@ -124,31 +141,13 @@ struct regmap {
>       /* number of entries in reg_defaults_raw */
>       unsigned int num_reg_defaults_raw;
>  
> -     /* if set, only the cache is modified not the HW */
> -     bool cache_only;
> -     /* if set, only the HW is modified not the cache */
> -     bool cache_bypass;
> -     /* if set, remember to free reg_defaults_raw */
> -     bool cache_free;
> -
>       struct reg_default *reg_defaults;
>       const void *reg_defaults_raw;
>       void *cache;
> -     /* if set, the cache contains newer data than the HW */
> -     bool cache_dirty;
> -     /* if set, the HW registers are known to match map->reg_defaults */
> -     bool no_sync_defaults;
>  
>       struct reg_sequence *patch;
>       int patch_regs;
>  
> -     /* if set, converts bulk read to single read */
> -     bool use_single_read;
> -     /* if set, converts bulk read to single read */
> -     bool use_single_write;
> -     /* if set, the device supports multi write mode */
> -     bool can_multi_write;
> -
>       /* if set, raw reads/writes are limited to this size */
>       size_t max_raw_read;
>       size_t max_raw_write;
> -- 
> 1.9.1
> 
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