On Thu, Oct 01, 2015 at 10:24:42AM +0800, yitian wrote: > I think maybe two reasons: > 1. designware I2S IP in my chipset(new design) is using tx empty and rx > available signal as the DMA handshaking signal, but it may be not true > for all chipsets. If I2S has separate signal as DMA handshaking signal, mask > irq should not impact DMA transfer. But Synopsys's engineer recommend us to > use > tx and rx irq signal as the DMA handshaking signal, meanwhile we cannot find > separate DMA handshaking signal from designware's IP spec, that's why tx/rx > irq > will impact DMA transfer.
If that's what the Synopsis engineers recommend I'd guess that other integrations are doing the same thing. > 2. I am using a FPGA for test, the cpu frequency of it is only 26MHz, that > means > XRUN is very easy to happen on my board. But I guess most of the developers > are using real chipset which can have at least 600MHz frequency so XRUN is > not easy to be reproduced. As my test, No XUN, no this bug... Ah, that might be it - it might just be that other systems are working due to race conditions.
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