On Fri, Nov 17, 2006 at 10:22:20AM +0100, Andi Kleen wrote: > > The former > > stores from/to information into MSRs and is very small (4 branches). > > P4 since Prescott has 16 > Yes. I was talking about Core 2
> > On recent processors LBR and BTS can be constrained by priv level. > > Doesn't help for kernel debugging. > Well, if you set if for kernel level only, you do not capture user level branches. This may happen if you crash soon after you've entered the kernel and you have a small buffer. -- -Stephane - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
