The various interrupt flow handlers in ath79 are cascading interrupt
handlers. They all have a disable_irq_nosync()/enable_irq() pair
around the generic_handle_irq() call. The value of this disable/enable
is zero because its a complete noop:

disable_irq_nosync() merily increments the disable count without
actually masking the interrupt. enable_irq() soleley decrements the
disable count without touching the interrupt chip. The interrupt
cannot arrive again because the complete call chain runs with
interrupts disabled.

Remove it.

Signed-off-by: Thomas Gleixner <t...@linutronix.de>
Cc: Ralf Baechle <r...@linux-mips.org>
Cc: linux-m...@linux-mips.org
---
 arch/mips/ath79/irq.c |   18 ++----------------
 1 file changed, 2 insertions(+), 16 deletions(-)

Index: tip/arch/mips/ath79/irq.c
===================================================================
--- tip.orig/arch/mips/ath79/irq.c
+++ tip/arch/mips/ath79/irq.c
@@ -124,8 +124,6 @@ static void ar934x_ip2_irq_dispatch(unsi
 {
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);
 
        if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) {
@@ -137,8 +135,6 @@ static void ar934x_ip2_irq_dispatch(unsi
        } else {
                spurious_interrupt();
        }
-
-       enable_irq(irq);
 }
 
 static void ar934x_ip2_irq_init(void)
@@ -157,14 +153,12 @@ static void qca955x_ip2_irq_dispatch(uns
 {
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
        status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL;
 
        if (status == 0) {
                spurious_interrupt();
-               goto enable;
+               return;
        }
 
        if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) {
@@ -176,17 +170,12 @@ static void qca955x_ip2_irq_dispatch(uns
                /* TODO: flush DDR? */
                generic_handle_irq(ATH79_IP2_IRQ(1));
        }
-
-enable:
-       enable_irq(irq);
 }
 
 static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
 {
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
        status &= QCA955X_EXT_INT_PCIE_RC2_ALL |
                  QCA955X_EXT_INT_USB1 |
@@ -194,7 +183,7 @@ static void qca955x_ip3_irq_dispatch(uns
 
        if (status == 0) {
                spurious_interrupt();
-               goto enable;
+               return;
        }
 
        if (status & QCA955X_EXT_INT_USB1) {
@@ -211,9 +200,6 @@ static void qca955x_ip3_irq_dispatch(uns
                /* TODO: flush DDR? */
                generic_handle_irq(ATH79_IP3_IRQ(2));
        }
-
-enable:
-       enable_irq(irq);
 }
 
 static void qca955x_irq_init(void)


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