On 2015-07-01 22:20, Cory Tusar wrote:
> This commit extends the existing Vybrid QSPI devicetree implementation
> to also describe the qspi1 functional block.
>
> Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
> ---
> arch/arm/boot/dts/vfxxx.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
> index 089a263..a7c370e 100644
> --- a/arch/arm/boot/dts/vfxxx.dtsi
> +++ b/arch/arm/boot/dts/vfxxx.dtsi
> @@ -251,6 +251,19 @@
> status = "disabled";
> };
>
> + qspi1: quadspi@400c4000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,vf610-qspi";
> + reg = <0x400c4000 0x1000>, <0x50000000
> 0x10000000>;
> + reg-names = "QuadSPI", "QuadSPI-memory";
> + interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks VF610_CLK_QSPI1_EN>,
> + <&clks VF610_CLK_QSPI1>;
> + clock-names = "qspi_en", "qspi";
> + status = "disabled";
> + };
> +
> iomuxc: iomuxc@40048000 {
> compatible = "fsl,vf610-iomuxc";
> reg = <0x40048000 0x1000>;
This seem to be at the wrong place under aips0. qspi1 should be under
aips1. just before fec0. But other than that, I checked the addresses
looks good to me. Hence with that change applied you can include:
Reviewed-by: Stefan Agner <ste...@agner.ch>
--
Stefan
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